EBNF Syntax: Verilog 2001

Syntax Productions

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Start Symbol (source_text)

Name	Production
always_construct	`'always'` statement
binary_base	`"'b"` `"'B"`
binary_digit	`'x'` `'X'` `'z'` `'Z'` `'0'` `'1'`
binary_number	[ size ] binary_base binary_digit { `'_'` \| binary_digit }^(#1) ( [ size ] signed_binary_base binary_digit { `'_'` \| binary_digit } )^(vlog2001)^(#1)
binary_operator	`'+'` `'-'` *`''` `'/'` `'%'` `'=='` `'!='` `'==='` `'!=='` `'&&'` `'\|\|'` `'<'` `'<='` `'>'` `'>='` `'&'` `'\|'` `'^'` `'^~'` `'~^'` `'>>'` `'<<'` `''`^(vlog2001) `'>>>'`^(vlog2001) `'<<<'`^(vlog2001)
block_item_declaration	parameter_declaration reg_declaration integer_declaration real_declaration time_declaration realtime_declaration event_declaration
blocking_assignment	reg_lvalue `'='` [ delay_or_event_control ] expression
case_item	expression { `','` expression } `':'` statement_or_null `'default'` [ `':'` ] statement_or_null
case_statement	`'case'` `'('` expression `')'` case_item { case_item } `'endcase'` `'casez'` `'('` expression `')'` case_item { case_item } `'endcase'` `'casex'` `'('` expression `')'` case_item { case_item } `'endcase'`
charge_strength	`'('` `'small'` `')'`^(#2) `'('` `'medium'` `')'`^(#2) `'('` `'large'` `')'`^(#2)
cmos_switch_instance	[ name_of_gate_instance ] `'('` output_terminal `','` input_terminal `','` ncontrol_terminal `','` pcontrol_terminal `')'`
cmos_switchtype	`'cmos'` `'rcmos'`
combinational_body	`'table'` combinational_entry { combinational_entry } `'endtable'`
combinational_entry	level_input_list `':'` output_symbol `';'`
comment (not used)	short_comment long_comment
concatenation	`'{'` expression { `','` expression } `'}'`
conditional_statement	`'if'` `'('` expression `')'` statement_or_null [ `'else'` statement_or_null ]
constant_expression	constant_primary^(#3)^(#4) unary_operator constant_primary^(#4)^(#5) constant_expression binary_operator constant_expression^(#3)^(#4)^(#5)^(#6) constant_expression `'?'` constant_expression `':'` constant_expression^(#3)^(#4)^(#5)^(#6) string^(#6)
constant_mintypmax_expression	constant_expression^(#7) constant_expression `':'` constant_expression `':'` constant_expression^(#7)
constant_primary	number parameter_identifier constant_concatenation^(#8) constant_multiple_concatenation^(#8)
continuous_assign	`'assign'` [ drive_strength ] [ delay3 ] list_of_net_assignments `';'`
controlled_timing_check_event	timing_check_event_control specify_terminal_descriptor [ `'&&&'` timing_check_condition ]
current_state	level_symbol
data_source_expression	expression
decimal_base	`"'d"` `"'D"`
decimal_digit	`'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'`
decimal_number	[ sign ] unsigned_number^(#9) [ size ] decimal_base unsigned_number^(#9) ( [ size ] signed_decimal_base unsigned_number )^(vlog2001)^(#9)
delay2	`'#'` delay_value^(#10) `'#'` `'('` delay_value [ `','` delay_value ] `')'`^(#10)
delay3	`'#'` delay_value^(#11) `'#'` `'('` delay_value [ `','` delay_value [ `','` delay_value ] ] `')'`^(#11)
delay_control	`'#'` delay_value^(#12) `'#'` `'('` mintypmax_expression `')'`^(#12)
delay_or_event_control	delay_control event_control `'repeat'` `'('` expression `')'` event_control
delay_value	unsigned_number^(#13) parameter_identifier^(#14) constant_mintypmax_expression^(#13)^(#14)
description	module_declaration udp_declaration
disable_statement	`'disable'` task_identifier `';'`^(#15) `'disable'` block_identifier `';'`^(#15)
drive_strength	`'('` strength0 `','` strength1 `')'`^(#16) `'('` strength1 `','` strength0 `')'`^(#16) `'('` strength0 `','` `'highz1'` `')'`^(#16) `'('` strength1 `','` `'highz0'` `')'`^(#16) `'('` `'highz1'` `','` strength0 `')'`^(#16) `'('` `'highz0'` `','` strength1 `')'`^(#16)
edge_control_specifier	`'edge'` `'['` edge_descriptor [ `','` edge_descriptor ] `']'`
edge_descriptor	`'01'` `'10'` `'0x'` `'x1'` `'1x'` `'x0'`
edge_identifier	`'posedge'` `'negedge'`
edge_indicator	`'('` level_symbol level_symbol `')'` edge_symbol
edge_input_list	{ level_symbol } edge_indicator { level_symbol }
edge_sensitive_path_declaration	parallel_edge_sensitive_path_description `'='` path_delay_value^(#17) full_edge_sensitive_path_description `'='` path_delay_value^(#17)
edge_symbol	`'r'` `'R'` `'f'` `'F'` `'p'` `'P'` `'n'` `'N'` *`''`**
enable_gate_instance	[ name_of_gate_instance ] `'('` output_terminal `','` input_terminal `','` enable_terminal `')'`
enable_gatetype	`'bufif0'` `'bufif1'` `'notif0'` `'notif1'`
enable_terminal	scalar_expression
escaped_identifier	`'\'` { `ANY_CHAR_EXCEPT_WHITESPACE` } `WHITESPACE`
event_control	`'@'` event_identifier^(#18) `'@'` `'('` event_expression `')'`^(#18) ( `'@'` *`''`** )^(vlog2001)^(#18)
event_declaration	`'event'` event_identifier { `','` event_identifier } `';'`
event_expression	expression^(#19)^(#20) event_identifier^(#20) `'posedge'` expression^(#21) `'negedge'` expression^(#22) event_expression `','` event_expression^(#19)^(#20)^(#21)^(#22) ( event_expression `'or'` event_expression )^(vlog2001)^(#19)^(#20)^(#21)^(#22)
event_trigger	`'->'` event_identifier `';'`
expression	primary^(#23)^(#24) unary_operator primary^(#24)^(#25) expression binary_operator expression^(#23)^(#24)^(#25)^(#26) expression `'?'` expression `':'` expression^(#23)^(#24)^(#25)^(#26) string^(#26)
full_edge_sensitive_path_description	`'('` [ edge_identifier ] list_of_path_inputs *`'>'` list_of_path_outputs [ polarity_operator ] `':'` data_source_expression `')'`**
full_path_description	`'('` list_of_path_inputs [ polarity_operator ] *`'>'` list_of_path_outputs `')'`**
function_call	function_identifier `'('` expression { `','` expression } `')'` name_of_system_function [ `'('` expression { `','` expression } `')'` ]
function_declaration	`'function'` [ `'automatic'` ]^(vlog2001) [ range_or_type ] function_identifier `';'` function_item_declaration { function_item_declaration } statement `'endfunction'`
function_item_declaration	block_item_declaration input_declaration
gate_instantiation	n_input_gatetype [ drive_strength ] [ delay2 ] n_input_gate_instance { `','` n_input_gate_instance } `';'` n_output_gatetype [ drive_strength ] [ delay2 ] n_output_gate_instance { `','` n_output_gate_instance } `';'` enable_gatetype [ drive_strength ] [ delay3 ] enable_gate_instance { `','` enable_gate_instance } `';'` mos_switchtype [ delay3 ] mos_switch_instance { `','` mos_switch_instance } `';'` pass_switchtype pass_switch_instance { `','` pass_switch_instance } `';'` pass_en_switchtype [ delay3 ] pass_en_switch_instance { `','` pass_en_switch_instance } `';'` cmos_switchtype [ delay3 ] cmos_switch_instance { `','` cmos_switch_instance } `';'` `'pullup'` [ pullup_strength ] pull_gate_instance { `','` pull_gate_instance } `';'` `'pulldown'` [ pulldown_strength ] pull_gate_instance { `','` pull_gate_instance } `';'`
hex_base	`"'h"` `"'H"`
hex_digit	`'x'` `'X'` `'z'` `'Z'` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'` `'a'` `'b'` `'c'` `'d'` `'e'` `'f'` `'A'` `'B'` `'C'` `'D'` `'E'` `'F'`
hex_number	[ size ] hex_base hex_digit { `'_'` \| hex_digit }^(#27) ( [ size ] signed_hex_base hex_digit { `'_'` \| hex_digit } )^(vlog2001)^(#27)
identifier	single_identifier { `'.'` single_identifier }
init_val	`"1'b0"` `"1'b1"` `"1'bx"` `"1'bX"` `"1'B0"` `"1'B1"` `"1'Bx"` `"1'BX"` `'1'` `'0'`
initial_construct	`'initial'` statement
inout_declaration	`'inout'` [ range ] list_of_port_identifiers `';'`
inout_terminal	terminal_identifier^(#28) terminal_identifier `'['` constant_expression `']'`^(#28)
input_declaration	`'input'` [ range ] list_of_port_identifiers `';'`
input_identifier	input_port_identifier^(#29) inout_port_identifier^(#29)
input_terminal	scalar_expression
integer_declaration	`'integer'` list_of_register_identifiers `';'`
level_input_list	level_symbol { level_symbol }
level_symbol	`'0'` `'1'` `'x'` `'X'` `'?'` `'b'` `'B'`
limit_value	constant_mintypmax_expression
list_of_module_connections	ordered_port_connection { `','` ordered_port_connection } named_port_connection { `','` named_port_connection }
list_of_net_assignments	net_assignment { `','` net_assignment }
list_of_net_decl_assignments	net_decl_assignment { `','` net_decl_assignment }
list_of_net_identifiers	net_identifier { `','` net_identifier }
list_of_param_assignments	param_assignment { `','` param_assignment }
list_of_path_delay_expressions	t_path_delay_expression^(#30) trise_path_delay_expression `','` tfall_path_delay_expression^(#30) trise_path_delay_expression `','` tfall_path_delay_expression `','` tz_path_delay_expression^(#30) t01_path_delay_expression `','` t10_path_delay_expression `','` t0z_path_delay_expression `','` tz1_path_delay_expression `','` t1z_path_delay_expression `','` tz0_path_delay_expression^(#30) t01_path_delay_expression `','` t10_path_delay_expression `','` t0z_path_delay_expression `','` tz1_path_delay_expression `','` t1z_path_delay_expression `','` tz0_path_delay_expression `','` t0x_path_delay_expression `','` tx1_path_delay_expression `','` t1x_path_delay_expression `','` tx0_path_delay_expression `','` txz_path_delay_expression `','` tzx_path_delay_expression^(#30)
list_of_path_inputs	specify_input_terminal_descriptor { `','` specify_input_terminal_descriptor }
list_of_path_outputs	specify_output_terminal_descriptor { `','` specify_output_terminal_descriptor }
list_of_port_identifiers	port_identifier { `','` port_identifier }
list_of_ports	`'('` port { `','` port } `')'`
list_of_real_identifiers	real_identifier { `','` real_identifier }
list_of_register_identifiers	register_name { `','` register_name }
list_of_specparam_assignments	specparam_assignment { `','` specparam_assignment }
long_comment	*`'/'` `COMMENT_TEXT` `'/'`*
loop_statement	`'forever'` statement `'repeat'` `'('` expression `')'` statement `'while'` `'('` expression `')'` statement `'for'` `'('` reg_assignment `';'` expression `';'` reg_assignment `')'` statement
mintypmax_expression	expression^(#31) expression `':'` expression `':'` expression^(#31)
module_declaration	module_keyword module_identifier [ list_of_ports ] `';'` { module_item } `'endmodule'`
module_instance	name_of_instance `'('` [ list_of_module_connections ] `')'`
module_instantiation	module_identifier [ parameter_value_assignment ] module_instance { `','` module_instance } `';'`
module_item	module_item_declaration parameter_override continuous_assign gate_instantiation udp_instantiation^(#32) module_instantiation^(#32) specify_block initial_construct always_construct
module_item_declaration	parameter_declaration input_declaration^(#35) output_declaration^(#34) inout_declaration^(#33) net_declaration reg_declaration integer_declaration real_declaration time_declaration realtime_declaration event_declaration ( port_direction net_declaration )^(vlog2001)^(#33)^(#34)^(#35) ( port_direction reg_declaration )^(vlog2001)^(#33)^(#34)^(#35) ( port_direction integer_declaration )^(vlog2001)^(#33)^(#34)^(#35) ( port_direction time_declaration )^(vlog2001)^(#33)^(#34)^(#35) task_declaration function_declaration
module_keyword	`'module'` `'macromodule'`
mos_switch_instance	[ name_of_gate_instance ] `'('` output_terminal `','` input_terminal `','` enable_terminal `')'`
mos_switchtype	`'nmos'` `'pmos'` `'rnmos'` `'rpmos'`
multiple_concatenation	`'{'` expression `'{'` expression { `','` expression } `'}'` `'}'`
n_input_gate_instance	[ name_of_gate_instance ] `'('` output_terminal `','` input_terminal { `','` input_terminal } `')'`
n_input_gatetype	`'and'` `'nand'` `'or'` `'nor'` `'xor'` `'xnor'`
n_output_gate_instance	[ name_of_gate_instance ] `'('` output_terminal { `','` output_terminal } `','` input_terminal `')'`
n_output_gatetype	`'buf'` `'not'`
name_of_gate_instance	gate_instance_identifier [ range ]
name_of_instance	module_instance_identifier [ range ]
name_of_system_function	`'$'` identifier
name_of_udp_instance	udp_instance_identifier [ range ]
named_port_connection	`'.'` port_identifier `'('` [ expression ] `')'`
ncontrol_terminal	scalar_expression
net_assignment	net_lvalue `'='` expression
net_decl_assignment	net_identifier `'='` expression
net_declaration	net_type [ `'vectored'` \| `'scalared'` ] [ `'signed'` ]^(vlog2001) [ range ] [ delay3 ] list_of_net_identifiers `';'`^(#36) `'trireg'` [ `'vectored'` \| `'scalared'` ] [ charge_strength ] [ `'signed'` ]^(vlog2001) [ range ] [ delay3 ] list_of_net_identifiers `';'` net_type [ `'vectored'` \| `'scalared'` ] [ drive_strength ] [ `'signed'` ]^(vlog2001) [ range ] [ delay3 ] list_of_net_decl_assignments `';'`^(#36)
net_lvalue	net_identifier^(#37) net_identifier `'['` expression `']'`^(#37) net_identifier `'['` msb_constant_expression `':'` lsb_constant_expression `']'`^(#37) net_concatenation
net_type	`'wire'` `'tri'` `'tri1'` `'supply0'` `'wand'` `'triand'` `'tri0'` `'supply1'` `'wor'` `'trior'`
next_state	output_symbol `'-'`
non_blocking_assignment	reg_lvalue `'<='` [ delay_or_event_control ] expression
notify_register	register_identifier
number	decimal_number^(#38)^(#39) octal_number^(#38) binary_number^(#38) hex_number^(#38) real_number^(#38)^(#39)
octal_base	`"'o"` `"'O"`
octal_digit	`'x'` `'X'` `'z'` `'Z'` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'`
octal_number	[ size ] octal_base octal_digit { `'_'` \| octal_digit }^(#40) ( [ size ] signed_octal_base octal_digit { `'_'` \| octal_digit } )^(vlog2001)^(#40)
ordered_port_connection	[ expression ]
output_declaration	`'output'` [ range ] list_of_port_identifiers `';'`
output_identifier	output_port_identifier^(#41) inout_port_identifier^(#41)
output_symbol	`'0'` `'1'` `'x'` `'X'`
output_terminal	terminal_identifier^(#42) terminal_identifier `'['` constant_expression `']'`^(#42)
par_block	`'fork'` [ `':'` block_identifier { block_item_declaration } ] { statement } `'join'`
parallel_edge_sensitive_path_description	`'('` [ edge_identifier ] specify_input_terminal_descriptor `'=>'` specify_output_terminal_descriptor [ polarity_operator ] `':'` data_source_expression `')'`
parallel_path_description	`'('` specify_input_terminal_descriptor [ polarity_operator ] `'=>'` specify_output_terminal_descriptor `')'`
param_assignment	parameter_identifier `'='` constant_expression
parameter_declaration	`'parameter'` list_of_param_assignments `';'` ( `'localparam'` list_of_param_assignments `';'` )^(vlog2001)
parameter_override	`'defparam'` list_of_param_assignments `';'`
parameter_value_assignment	`'#'` `'('` expression { `','` expression } `')'`
pass_en_switch_instance	[ name_of_gate_instance ] `'('` inout_terminal `','` inout_terminal `','` enable_terminal `')'`
pass_en_switchtype	`'tranif0'` `'tranif1'` `'rtranif0'` `'rtranif1'`
pass_switch_instance	[ name_of_gate_instance ] `'('` inout_terminal `','` inout_terminal `')'`
pass_switchtype	`'tran'` `'rtran'`
path_declaration	simple_path_declaration^(#43) edge_sensitive_path_declaration^(#43) state_dependent_path_declaration
path_delay_expression	constant_mintypmax_expression
path_delay_value	list_of_path_delay_expressions `'('` list_of_path_delay_expressions `')'`
pcontrol_terminal	scalar_expression
polarity_operator	`'+'` `'-'`
port	[ port_expression ] `'.'` port_identifier `'('` [ port_expression ] `')'`
port_direction	`'input'` `'output'` `'inout'`
port_expression	port_reference `'{'` port_reference { `','` port_reference } `'}'`
port_reference	port_identifier^(#44) port_identifier `'['` constant_expression `']'`^(#44) port_identifier `'['` msb_constant_expression `':'` lsb_constant_expression `']'`^(#44)
primary	number identifier^(#45) identifier `'['` expression `']'`^(#45) identifier `'['` msb_constant_expression `':'` lsb_constant_expression `']'`^(#45) concatenation^(#46) multiple_concatenation^(#46) function_call^(#45) `'('` mintypmax_expression `')'`
procedural_continuous_assignment	`'assign'` reg_assignment `';'` `'deassign'` reg_lvalue `';'` `'force'` reg_assignment `';'`^(#48) `'force'` net_assignment `';'`^(#48) `'release'` reg_lvalue `';'`^(#47) `'release'` net_lvalue `';'`^(#47)
procedural_timing_control_statement	delay_or_event_control statement_or_null
pull_gate_instance	[ name_of_gate_instance ] `'('` output_terminal `')'`
pulldown_strength	`'('` strength0 `','` strength1 `')'`^(#49) `'('` strength1 `','` strength0 `')'`^(#49) `'('` strength0 `')'`^(#49)
pullup_strength	`'('` strength0 `','` strength1 `')'`^(#50) `'('` strength1 `','` strength0 `')'`^(#50) `'('` strength1 `')'`^(#50)
pulse_control_specparam	`'PATHPULSE$'` `'='` `'('` reject_limit_value [ `','` error_limit_value ] `')'` `';'`^(#51) `'PATHPULSE$'` specify_input_terminal_descriptor `'$'` specify_output_terminal_descriptor `'='` `'('` reject_limit_value [ `','` error_limit_value ] `')'` `';'`^(#51)
range	`'['` msb_constant_expression `':'` lsb_constant_expression `']'`
range_or_type	range `'integer'` `'real'` `'realtime'` `'time'`
real_declaration	`'real'` list_of_real_identifiers `';'`
real_number	[ sign ] unsigned_number `'.'` unsigned_number^(#52) [ sign ] unsigned_number [ `'.'` unsigned_number ] `'e'` [ sign ] unsigned_number^(#52) [ sign ] unsigned_number [ `'.'` unsigned_number ] `'E'` [ sign ] unsigned_number^(#52)
realtime_declaration	`'realtime'` list_of_real_identifiers `';'`
reg_assignment	reg_lvalue `'='` expression
reg_declaration	`'reg'` [ `'signed'` ]^(vlog2001) [ range ] list_of_register_identifiers `';'`
reg_lvalue	reg_identifier^(#53) reg_identifier `'['` expression `']'`^(#53) reg_identifier `'['` msb_constant_expression `':'` lsb_constant_expression `']'`^(#53) reg_concatenation
register_name	register_identifier^(#54) memory_identifier `'['` upper_limit_constant_expression `':'` lower_limit_constant_expression `']'`^(#54)
scalar_constant	`"1'b0"` `"1'b1"` `"1'B0"` `"1'B1"` `"'b0"` `"'b1"` `"'B0"` `"'B1"` `'1'` `'0'`
scalar_timing_check_condition	expression^(#55)^(#56) `'~'` expression^(#56) expression `'=='` scalar_constant^(#55)^(#56) expression `'==='` scalar_constant^(#55)^(#56) expression `'!='` scalar_constant^(#55)^(#56) expression `'!=='` scalar_constant^(#55)^(#56)
seq_block	`'begin'` [ `':'` block_identifier { block_item_declaration } ] { statement } `'end'`
seq_input_list	level_input_list^(#57) edge_input_list^(#57)
sequencial_body	[ udp_initial_statement ] `'table'` sequencial_entry { sequencial_entry } `'endtable'`
sequencial_entry	seq_input_list `':'` current_state `':'` next_state `';'`
short_comment	`'//'` `COMMENT_TEXT` `NEWLINE`
sign	`'+'` `'-'`
signed_binary_base	`"'sb"` `"'SB"` `"'sB"` `"'Sb"`
signed_decimal_base	`"'sd"` `"'SD"` `"'sD"` `"'Sd"`
signed_hex_base	`"'sh"` `"'SH"` `"'sH"` `"'Sh"`
signed_octal_base	`"'so"` `"'SO"` `"'sO"` `"'So"`
simple_identifier	`ALPHA` { `ALPHANUM` \| `'_'` \| `'$'` }
simple_path_declaration	parallel_path_description `'='` path_delay_value^(#58) full_path_description `'='` path_delay_value^(#58)
single_identifier	simple_identifier escaped_identifier
size	unsigned_number
source_text	{ description }
specify_block	`'specify'` { specify_item } `'endspecify'`
specify_input_terminal_descriptor	input_identifier^(#59) input_identifier `'['` constant_expression `']'`^(#59) input_identifier `'['` msb_constant_expression `':'` lsb_constant_expression `']'`^(#59)
specify_item	specparam_declaration path_declaration system_timing_check
specify_output_terminal_descriptor	output_identifier^(#60) output_identifier `'['` constant_expression `']'`^(#60) output_identifier `'['` msb_constant_expression `':'` lsb_constant_expression `']'`^(#60)
specify_terminal_descriptor	specify_input_terminal_descriptor^(#61) specify_output_terminal_descriptor^(#61)
specparam_assignment	specparam_identifier `'='` constant_expression pulse_control_specparam
specparam_declaration	`'specparam'` list_of_specparam_assignments `';'`
state_dependent_path_declaration	`'if'` `'('` conditional_expression `')'` simple_path_declaration^(#62) `'if'` `'('` conditional_expression `')'` edge_sensitive_path_declaration^(#62) `'ifnone'` simple_path_declaration
statement	blocking_assignment `';'`^(#63)^(#64) non_blocking_assignment `';'`^(#63)^(#64) procedural_continuous_assignment `';'` procedural_timing_control_statement^(#65) conditional_statement case_statement loop_statement^(#65) wait_statement disable_statement event_trigger seq_block par_block task_enable^(#64) system_task_enable
statement_or_null	statement `';'`
strength0	`'supply0'` `'strong0'` `'pull0'` `'weak0'`
strength1	`'supply1'` `'strong1'` `'pull1'` `'weak1'`
string	`'"'` `ANY_CHAR_EXCEPT_NEWLINE` `'"'`
system_task_enable	system_task_name [ `'('` expression { `','` expression } `')'` ] `';'`
system_task_name	`'$'` identifier
system_timing_check	`'$setup'` `'('` timing_check_event `','` timing_check_event `','` timing_check_limit [ `','` notify_register ] `')'` `';'` `'$hold'` `'('` timing_check_event `','` timing_check_event `','` timing_check_limit [ `','` notify_register ] `')'` `';'` `'$period'` `'('` controlled_timing_check_event `','` timing_check_limit [ `','` notify_register ] `')'` `';'` `'$width'` `'('` controlled_timing_check_event `','` timing_check_limit `','` constant_expression [ `','` notify_register ] `')'` `';'` `'$skew'` `'('` timing_check_event `','` timing_check_event `','` timing_check_limit [ `','` notify_register ] `')'` `';'` `'$recovery'` `'('` controlled_timing_check_event `','` timing_check_event `','` timing_check_limit [ `','` notify_register ] `')'` `';'` `'$setuphold'` `'('` timing_check_event `','` timing_check_event `','` timing_check_limit `','` timing_check_limit [ `','` notify_register ] `')'` `';'`
task_declaration	`'task'` [ `'automatic'` ]^(vlog2001) task_identifier `';'` { task_item_declaration } statement_or_null `'endtask'`
task_enable	task_identifier [ `'('` expression { `','` expression } `')'` ] `';'`
task_item_declaration	block_item_declaration input_declaration output_declaration inout_declaration
time_declaration	`'time'` list_of_register_identifiers `';'`
timing_check_condition	scalar_timing_check_condition^(#66) `'('` scalar_timing_check_condition `')'`^(#66)
timing_check_event	[ timing_check_event_control ] specify_terminal_descriptor [ `'&&&'` timing_check_condition ]
timing_check_event_control	`'posedge'` `'negedge'` edge_control_specifier
timing_check_limit	expression
udp_body	combinational_body^(#67) sequencial_body^(#67)
udp_declaration	`'primitive'` udp_identifier `'('` udp_port_list `')'` `';'` udp_port_declaration { udp_port_declaration } udp_body `'endprimitive'`
udp_initial_statement	`'initial'` udp_output_port_identifier `'='` init_val `';'`
udp_instance	[ name_of_udp_instance ] `'('` output_terminal `','` input_terminal { `','` input_terminal } `')'`
udp_instantiation	udp_identifier [ drive_strength ] [ delay2 ] udp_instance { `','` udp_instance } `';'`
udp_port_declaration	output_declaration input_declaration reg_declaration
udp_port_list	output_port_identifier `','` input_port_identifier { `','` input_port_identifier }
unary_operator	`'+'` `'-'` `'!'` `'~'` `'&'` `'~&'` `'\|'` `'~\|'` `'^'` `'~^'` `'^~'`
unsigned_number	decimal_digit { `'_'` \| decimal_digit }
wait_statement	`'wait'` `'('` expression `')'` statement_or_null

Variants

Variant	Used in	Variant Expressions
vlog2001	binary_number	... [ size ] signed_binary_base binary_digit { `'_'` \| binary_digit } ...
	binary_operator	... `''` ... ... `'>>>'` ... ... `'<<<'`** ...
	decimal_number	... [ size ] signed_decimal_base unsigned_number ...
	event_control	... `'@'` *`''`** ...
	event_expression	... event_expression `'or'` event_expression ...
	function_declaration	... [ `'automatic'` ] ...
	hex_number	... [ size ] signed_hex_base hex_digit { `'_'` \| hex_digit } ...
	module_item_declaration	... port_direction net_declaration ... ... port_direction reg_declaration ... ... port_direction integer_declaration ... ... port_direction time_declaration ...
	net_declaration	... [ `'signed'` ] ... ... [ `'signed'` ] ... ... [ `'signed'` ] ...
	octal_number	... [ size ] signed_octal_base octal_digit { `'_'` \| octal_digit } ...
	parameter_declaration	... `'localparam'` list_of_param_assignments `';'` ...
	reg_declaration	... [ `'signed'` ] ...
	task_declaration	... [ `'automatic'` ] ...

Terminals

Terminal	Used in
`ALPHA`	simple_identifier
`ALPHANUM`	simple_identifier
`ANY_CHAR_EXCEPT_NEWLINE`	string
`ANY_CHAR_EXCEPT_WHITESPACE`	escaped_identifier
`COMMENT_TEXT`	long_comment / short_comment
`NEWLINE`	short_comment
`WHITESPACE`	escaped_identifier

Literals

Literal	Used in
`!`	unary_operator
`!=`	binary_operator / scalar_timing_check_condition
`!==`	binary_operator / scalar_timing_check_condition
`"`	string
`#`	delay2 / delay3 / delay_control / parameter_value_assignment
`$`	name_of_system_function / pulse_control_specparam / simple_identifier / system_task_name
`$hold`	system_timing_check
`$period`	system_timing_check
`$recovery`	system_timing_check
`$setup`	system_timing_check
`$setuphold`	system_timing_check
`$skew`	system_timing_check
`$width`	system_timing_check
`%`	binary_operator
`&`	binary_operator / unary_operator
`&&`	binary_operator
`&&&`	controlled_timing_check_event / timing_check_event
`'B`	binary_base
`'B0`	scalar_constant
`'B1`	scalar_constant
`'D`	decimal_base
`'H`	hex_base
`'O`	octal_base
`'SB`	signed_binary_base
`'SD`	signed_decimal_base
`'SH`	signed_hex_base
`'SO`	signed_octal_base
`'Sb`	signed_binary_base
`'Sd`	signed_decimal_base
`'Sh`	signed_hex_base
`'So`	signed_octal_base
`'b`	binary_base
`'b0`	scalar_constant
`'b1`	scalar_constant
`'d`	decimal_base
`'h`	hex_base
`'o`	octal_base
`'sB`	signed_binary_base
`'sD`	signed_decimal_base
`'sH`	signed_hex_base
`'sO`	signed_octal_base
`'sb`	signed_binary_base
`'sd`	signed_decimal_base
`'sh`	signed_hex_base
`'so`	signed_octal_base
`(`	case_statement / charge_strength / cmos_switch_instance / conditional_statement / delay2 / delay3 / delay_control / delay_or_event_control / drive_strength / edge_indicator / enable_gate_instance / event_control / full_edge_sensitive_path_description / full_path_description / function_call / list_of_ports / loop_statement / module_instance / mos_switch_instance / n_input_gate_instance / n_output_gate_instance / named_port_connection / parallel_edge_sensitive_path_description / parallel_path_description / parameter_value_assignment / pass_en_switch_instance / pass_switch_instance / path_delay_value / port / primary / pull_gate_instance / pulldown_strength / pullup_strength / pulse_control_specparam / state_dependent_path_declaration / system_task_enable / system_timing_check / task_enable / timing_check_condition / udp_declaration / udp_instance / wait_statement
`)`	case_statement / charge_strength / cmos_switch_instance / conditional_statement / delay2 / delay3 / delay_control / delay_or_event_control / drive_strength / edge_indicator / enable_gate_instance / event_control / full_edge_sensitive_path_description / full_path_description / function_call / list_of_ports / loop_statement / module_instance / mos_switch_instance / n_input_gate_instance / n_output_gate_instance / named_port_connection / parallel_edge_sensitive_path_description / parallel_path_description / parameter_value_assignment / pass_en_switch_instance / pass_switch_instance / path_delay_value / port / primary / pull_gate_instance / pulldown_strength / pullup_strength / pulse_control_specparam / state_dependent_path_declaration / system_task_enable / system_timing_check / task_enable / timing_check_condition / udp_declaration / udp_instance / wait_statement
`*`	binary_operator / edge_symbol / event_control
`**`	binary_operator
`*/`	long_comment
`*>`	full_edge_sensitive_path_description / full_path_description
`+`	binary_operator / polarity_operator / sign / unary_operator
`,`	case_item / cmos_switch_instance / concatenation / delay2 / delay3 / drive_strength / edge_control_specifier / enable_gate_instance / event_declaration / event_expression / function_call / gate_instantiation / list_of_module_connections / list_of_net_assignments / list_of_net_decl_assignments / list_of_net_identifiers / list_of_param_assignments / list_of_path_delay_expressions / list_of_path_inputs / list_of_path_outputs / list_of_port_identifiers / list_of_ports / list_of_real_identifiers / list_of_register_identifiers / list_of_specparam_assignments / module_instantiation / mos_switch_instance / multiple_concatenation / n_input_gate_instance / n_output_gate_instance / parameter_value_assignment / pass_en_switch_instance / pass_switch_instance / port_expression / pulldown_strength / pullup_strength / pulse_control_specparam / system_task_enable / system_timing_check / task_enable / udp_instance / udp_instantiation / udp_port_list
`-`	binary_operator / next_state / polarity_operator / sign / unary_operator
`->`	event_trigger
`.`	identifier / named_port_connection / port / real_number
`/`	binary_operator
`/*`	long_comment
`//`	short_comment
`:`	case_item / combinational_entry / constant_expression / constant_mintypmax_expression / expression / full_edge_sensitive_path_description / mintypmax_expression / net_lvalue / par_block / parallel_edge_sensitive_path_description / port_reference / primary / range / reg_lvalue / register_name / seq_block / sequencial_entry / specify_input_terminal_descriptor / specify_output_terminal_descriptor
`;`	combinational_entry / continuous_assign / disable_statement / event_declaration / event_trigger / function_declaration / gate_instantiation / inout_declaration / input_declaration / integer_declaration / loop_statement / module_declaration / module_instantiation / net_declaration / output_declaration / parameter_declaration / parameter_override / procedural_continuous_assignment / pulse_control_specparam / real_declaration / realtime_declaration / reg_declaration / sequencial_entry / specparam_declaration / statement / statement_or_null / system_task_enable / system_timing_check / task_declaration / task_enable / time_declaration / udp_declaration / udp_initial_statement / udp_instantiation
`<`	binary_operator
`<<`	binary_operator
`<<<`	binary_operator
`<=`	binary_operator / non_blocking_assignment
`=`	blocking_assignment / edge_sensitive_path_declaration / net_assignment / net_decl_assignment / param_assignment / pulse_control_specparam / reg_assignment / simple_path_declaration / specparam_assignment / udp_initial_statement
`==`	binary_operator / scalar_timing_check_condition
`===`	binary_operator / scalar_timing_check_condition
`=>`	parallel_edge_sensitive_path_description / parallel_path_description
`>`	binary_operator
`>=`	binary_operator
`>>`	binary_operator
`>>>`	binary_operator
`?`	constant_expression / expression / level_symbol
`@`	event_control
`[`	edge_control_specifier / inout_terminal / net_lvalue / output_terminal / port_reference / primary / range / reg_lvalue / register_name / specify_input_terminal_descriptor / specify_output_terminal_descriptor
`\`	escaped_identifier
`]`	edge_control_specifier / inout_terminal / net_lvalue / output_terminal / port_reference / primary / range / reg_lvalue / register_name / specify_input_terminal_descriptor / specify_output_terminal_descriptor
`^`	binary_operator / unary_operator
`^~`	binary_operator / unary_operator
`_`	binary_number / hex_number / octal_number / simple_identifier / unsigned_number
`{`	concatenation / multiple_concatenation / port_expression
`\|`	binary_operator / unary_operator
`\|\|`	binary_operator
`}`	concatenation / multiple_concatenation / port_expression
`~`	scalar_timing_check_condition / unary_operator
`~&`	unary_operator
`~^`	binary_operator / unary_operator
`~\|`	unary_operator
`0`	binary_digit / decimal_digit / hex_digit / init_val / level_symbol / octal_digit / output_symbol / scalar_constant
`01`	edge_descriptor
`0x`	edge_descriptor
`1`	binary_digit / decimal_digit / hex_digit / init_val / level_symbol / octal_digit / output_symbol / scalar_constant
`1'b0`	init_val / scalar_constant
`1'B0`	init_val / scalar_constant
`1'b1`	init_val / scalar_constant
`1'B1`	init_val / scalar_constant
`1'bX`	init_val
`1'BX`	init_val
`1'bx`	init_val
`1'Bx`	init_val
`10`	edge_descriptor
`1x`	edge_descriptor
`2`	decimal_digit / hex_digit / octal_digit
`3`	decimal_digit / hex_digit / octal_digit
`4`	decimal_digit / hex_digit / octal_digit
`5`	decimal_digit / hex_digit / octal_digit
`6`	decimal_digit / hex_digit / octal_digit
`7`	decimal_digit / hex_digit / octal_digit
`8`	decimal_digit / hex_digit
`9`	decimal_digit / hex_digit
`a`	hex_digit
`A`	hex_digit
`always`	always_construct
`and`	n_input_gatetype
`assign`	continuous_assign / procedural_continuous_assignment
`automatic`	function_declaration / task_declaration
`B`	hex_digit / level_symbol
`b`	hex_digit / level_symbol
`begin`	seq_block
`buf`	n_output_gatetype
`bufif0`	enable_gatetype
`bufif1`	enable_gatetype
`C`	hex_digit
`c`	hex_digit
`case`	case_statement
`casex`	case_statement
`casez`	case_statement
`cmos`	cmos_switchtype
`D`	hex_digit
`d`	hex_digit
`deassign`	procedural_continuous_assignment
`default`	case_item
`defparam`	parameter_override
`disable`	disable_statement
`e`	hex_digit / real_number
`E`	hex_digit / real_number
`edge`	edge_control_specifier
`else`	conditional_statement
`end`	seq_block
`endcase`	case_statement
`endfunction`	function_declaration
`endmodule`	module_declaration
`endprimitive`	udp_declaration
`endspecify`	specify_block
`endtable`	combinational_body / sequencial_body
`endtask`	task_declaration
`event`	event_declaration
`F`	edge_symbol / hex_digit
`f`	edge_symbol / hex_digit
`for`	loop_statement
`force`	procedural_continuous_assignment
`forever`	loop_statement
`fork`	par_block
`function`	function_declaration
`highz0`	drive_strength
`highz1`	drive_strength
`if`	conditional_statement / state_dependent_path_declaration
`ifnone`	state_dependent_path_declaration
`initial`	initial_construct / udp_initial_statement
`inout`	inout_declaration / port_direction
`input`	input_declaration / port_direction
`integer`	integer_declaration / range_or_type
`join`	par_block
`large`	charge_strength
`localparam`	parameter_declaration
`macromodule`	module_keyword
`medium`	charge_strength
`module`	module_keyword
`N`	edge_symbol
`n`	edge_symbol
`nand`	n_input_gatetype
`negedge`	edge_identifier / event_expression / timing_check_event_control
`nmos`	mos_switchtype
`nor`	n_input_gatetype
`not`	n_output_gatetype
`notif0`	enable_gatetype
`notif1`	enable_gatetype
`or`	event_expression / n_input_gatetype
`output`	output_declaration / port_direction
`P`	edge_symbol
`p`	edge_symbol
`parameter`	parameter_declaration
`PATHPULSE$`	pulse_control_specparam
`pmos`	mos_switchtype
`posedge`	edge_identifier / event_expression / timing_check_event_control
`primitive`	udp_declaration
`pull0`	strength0
`pull1`	strength1
`pulldown`	gate_instantiation
`pullup`	gate_instantiation
`R`	edge_symbol
`r`	edge_symbol
`rcmos`	cmos_switchtype
`real`	range_or_type / real_declaration
`realtime`	range_or_type / realtime_declaration
`reg`	reg_declaration
`release`	procedural_continuous_assignment
`repeat`	delay_or_event_control / loop_statement
`rnmos`	mos_switchtype
`rpmos`	mos_switchtype
`rtran`	pass_switchtype
`rtranif0`	pass_en_switchtype
`rtranif1`	pass_en_switchtype
`scalared`	net_declaration
`signed`	net_declaration / reg_declaration
`small`	charge_strength
`specify`	specify_block
`specparam`	specparam_declaration
`strong0`	strength0
`strong1`	strength1
`supply0`	net_type / strength0
`supply1`	net_type / strength1
`table`	combinational_body / sequencial_body
`task`	task_declaration
`time`	range_or_type / time_declaration
`tran`	pass_switchtype
`tranif0`	pass_en_switchtype
`tranif1`	pass_en_switchtype
`tri`	net_type
`tri0`	net_type
`tri1`	net_type
`triand`	net_type
`trior`	net_type
`trireg`	net_declaration
`vectored`	net_declaration
`wait`	wait_statement
`wand`	net_type
`weak0`	strength0
`weak1`	strength1
`while`	loop_statement
`wire`	net_type
`wor`	net_type
`X`	binary_digit / hex_digit / level_symbol / octal_digit / output_symbol
`x`	binary_digit / hex_digit / level_symbol / octal_digit / output_symbol
`x0`	edge_descriptor
`x1`	edge_descriptor
`xnor`	n_input_gatetype
`xor`	n_input_gatetype
`Z`	binary_digit / hex_digit / octal_digit
`z`	binary_digit / hex_digit / octal_digit

Production Cross Reference

Production	Used in
always_construct	module_item
binary_base	binary_number
binary_digit	binary_number
binary_number	number
binary_operator	constant_expression / expression
block_item_declaration	function_item_declaration / par_block / seq_block / task_item_declaration
blocking_assignment	statement
case_item	case_statement
case_statement	statement
charge_strength	net_declaration
cmos_switch_instance	gate_instantiation
cmos_switchtype	gate_instantiation
combinational_body	udp_body
combinational_entry	combinational_body
concatenation	constant_primary / net_lvalue / primary / reg_lvalue
conditional_statement	statement
constant_expression	constant_expression / constant_mintypmax_expression / inout_terminal / net_lvalue / output_terminal / param_assignment / port_reference / primary / range / reg_lvalue / register_name / specify_input_terminal_descriptor / specify_output_terminal_descriptor / specparam_assignment / system_timing_check
constant_mintypmax_expression	delay_value / limit_value / path_delay_expression
constant_primary	constant_expression
continuous_assign	module_item
controlled_timing_check_event	system_timing_check
current_state	sequencial_entry
data_source_expression	full_edge_sensitive_path_description / parallel_edge_sensitive_path_description
decimal_base	decimal_number
decimal_digit	unsigned_number
decimal_number	number
delay2	gate_instantiation / udp_instantiation
delay3	continuous_assign / gate_instantiation / net_declaration
delay_control	delay_or_event_control
delay_or_event_control	blocking_assignment / non_blocking_assignment / procedural_timing_control_statement
delay_value	delay2 / delay3 / delay_control
description	source_text
disable_statement	statement
drive_strength	continuous_assign / gate_instantiation / net_declaration / udp_instantiation
edge_control_specifier	timing_check_event_control
edge_descriptor	edge_control_specifier
edge_identifier	full_edge_sensitive_path_description / parallel_edge_sensitive_path_description
edge_indicator	edge_input_list
edge_input_list	seq_input_list
edge_sensitive_path_declaration	path_declaration / state_dependent_path_declaration
edge_symbol	edge_indicator
enable_gate_instance	gate_instantiation
enable_gatetype	gate_instantiation
enable_terminal	enable_gate_instance / mos_switch_instance / pass_en_switch_instance
escaped_identifier	single_identifier
event_control	delay_or_event_control
event_declaration	block_item_declaration / module_item_declaration
event_expression	event_control / event_expression
event_trigger	statement
expression	blocking_assignment / case_item / case_statement / concatenation / conditional_statement / data_source_expression / delay_or_event_control / enable_terminal / event_expression / expression / function_call / input_terminal / loop_statement / mintypmax_expression / multiple_concatenation / named_port_connection / ncontrol_terminal / net_assignment / net_decl_assignment / net_lvalue / non_blocking_assignment / ordered_port_connection / parameter_value_assignment / pcontrol_terminal / primary / reg_assignment / reg_lvalue / scalar_timing_check_condition / state_dependent_path_declaration / system_task_enable / task_enable / timing_check_limit / wait_statement
full_edge_sensitive_path_description	edge_sensitive_path_declaration
full_path_description	simple_path_declaration
function_call	primary
function_declaration	module_item_declaration
function_item_declaration	function_declaration
gate_instantiation	module_item
hex_base	hex_number
hex_digit	hex_number
hex_number	number
identifier	constant_primary / delay_value / disable_statement / event_control / event_declaration / event_expression / event_trigger / function_call / function_declaration / inout_terminal / input_identifier / list_of_net_identifiers / list_of_port_identifiers / list_of_real_identifiers / module_declaration / module_instantiation / name_of_gate_instance / name_of_instance / name_of_system_function / name_of_udp_instance / named_port_connection / net_decl_assignment / net_lvalue / notify_register / output_identifier / output_terminal / par_block / param_assignment / port / port_reference / primary / reg_lvalue / register_name / seq_block / specparam_assignment / system_task_name / task_declaration / task_enable / udp_declaration / udp_initial_statement / udp_instantiation / udp_port_list
init_val	udp_initial_statement
initial_construct	module_item
inout_declaration	module_item_declaration / task_item_declaration
inout_terminal	pass_en_switch_instance / pass_switch_instance
input_declaration	function_item_declaration / module_item_declaration / task_item_declaration / udp_port_declaration
input_identifier	specify_input_terminal_descriptor
input_terminal	cmos_switch_instance / enable_gate_instance / mos_switch_instance / n_input_gate_instance / n_output_gate_instance / udp_instance
integer_declaration	block_item_declaration / module_item_declaration
level_input_list	combinational_entry / seq_input_list
level_symbol	current_state / edge_indicator / edge_input_list / level_input_list
limit_value	pulse_control_specparam
list_of_module_connections	module_instance
list_of_net_assignments	continuous_assign
list_of_net_decl_assignments	net_declaration
list_of_net_identifiers	net_declaration
list_of_param_assignments	parameter_declaration / parameter_override
list_of_path_delay_expressions	path_delay_value
list_of_path_inputs	full_edge_sensitive_path_description / full_path_description
list_of_path_outputs	full_edge_sensitive_path_description / full_path_description
list_of_port_identifiers	inout_declaration / input_declaration / output_declaration
list_of_ports	module_declaration
list_of_real_identifiers	real_declaration / realtime_declaration
list_of_register_identifiers	integer_declaration / reg_declaration / time_declaration
list_of_specparam_assignments	specparam_declaration
long_comment	comment
loop_statement	statement
mintypmax_expression	delay_control / primary
module_declaration	description
module_instance	module_instantiation
module_instantiation	module_item
module_item	module_declaration
module_item_declaration	module_item
module_keyword	module_declaration
mos_switch_instance	gate_instantiation
mos_switchtype	gate_instantiation
multiple_concatenation	constant_primary / primary
n_input_gate_instance	gate_instantiation
n_input_gatetype	gate_instantiation
n_output_gate_instance	gate_instantiation
n_output_gatetype	gate_instantiation
name_of_gate_instance	cmos_switch_instance / enable_gate_instance / mos_switch_instance / n_input_gate_instance / n_output_gate_instance / pass_en_switch_instance / pass_switch_instance / pull_gate_instance
name_of_instance	module_instance
name_of_system_function	function_call
name_of_udp_instance	udp_instance
named_port_connection	list_of_module_connections
ncontrol_terminal	cmos_switch_instance
net_assignment	list_of_net_assignments / procedural_continuous_assignment
net_decl_assignment	list_of_net_decl_assignments
net_declaration	module_item_declaration
net_lvalue	net_assignment / procedural_continuous_assignment
net_type	net_declaration
next_state	sequencial_entry
non_blocking_assignment	statement
notify_register	system_timing_check
number	constant_primary / primary
octal_base	octal_number
octal_digit	octal_number
octal_number	number
ordered_port_connection	list_of_module_connections
output_declaration	module_item_declaration / task_item_declaration / udp_port_declaration
output_identifier	specify_output_terminal_descriptor
output_symbol	combinational_entry / next_state
output_terminal	cmos_switch_instance / enable_gate_instance / mos_switch_instance / n_input_gate_instance / n_output_gate_instance / pull_gate_instance / udp_instance
par_block	statement
parallel_edge_sensitive_path_description	edge_sensitive_path_declaration
parallel_path_description	simple_path_declaration
param_assignment	list_of_param_assignments
parameter_declaration	block_item_declaration / module_item_declaration
parameter_override	module_item
parameter_value_assignment	module_instantiation
pass_en_switch_instance	gate_instantiation
pass_en_switchtype	gate_instantiation
pass_switch_instance	gate_instantiation
pass_switchtype	gate_instantiation
path_declaration	specify_item
path_delay_expression	list_of_path_delay_expressions
path_delay_value	edge_sensitive_path_declaration / simple_path_declaration
pcontrol_terminal	cmos_switch_instance
polarity_operator	full_edge_sensitive_path_description / full_path_description / parallel_edge_sensitive_path_description / parallel_path_description
port	list_of_ports
port_direction	module_item_declaration
port_expression	port
port_reference	port_expression
primary	expression
procedural_continuous_assignment	statement
procedural_timing_control_statement	statement
pull_gate_instance	gate_instantiation
pulldown_strength	gate_instantiation
pullup_strength	gate_instantiation
pulse_control_specparam	specparam_assignment
range	inout_declaration / input_declaration / name_of_gate_instance / name_of_instance / name_of_udp_instance / net_declaration / output_declaration / range_or_type / reg_declaration
range_or_type	function_declaration
real_declaration	block_item_declaration / module_item_declaration
real_number	number
realtime_declaration	block_item_declaration / module_item_declaration
reg_assignment	loop_statement / procedural_continuous_assignment
reg_declaration	block_item_declaration / module_item_declaration / udp_port_declaration
reg_lvalue	blocking_assignment / non_blocking_assignment / procedural_continuous_assignment / reg_assignment
register_name	list_of_register_identifiers
scalar_constant	scalar_timing_check_condition
scalar_timing_check_condition	timing_check_condition
seq_block	statement
seq_input_list	sequencial_entry
sequencial_body	udp_body
sequencial_entry	sequencial_body
short_comment	comment
sign	decimal_number / real_number
signed_binary_base	binary_number
signed_decimal_base	decimal_number
signed_hex_base	hex_number
signed_octal_base	octal_number
simple_identifier	single_identifier
simple_path_declaration	path_declaration / state_dependent_path_declaration
single_identifier	identifier
size	binary_number / decimal_number / hex_number / octal_number
source_text
specify_block	module_item
specify_input_terminal_descriptor	list_of_path_inputs / parallel_edge_sensitive_path_description / parallel_path_description / pulse_control_specparam / specify_terminal_descriptor
specify_item	specify_block
specify_output_terminal_descriptor	list_of_path_outputs / parallel_edge_sensitive_path_description / parallel_path_description / pulse_control_specparam / specify_terminal_descriptor
specify_terminal_descriptor	controlled_timing_check_event / timing_check_event
specparam_assignment	list_of_specparam_assignments
specparam_declaration	specify_item
state_dependent_path_declaration	path_declaration
statement	always_construct / function_declaration / initial_construct / loop_statement / par_block / seq_block / statement_or_null
statement_or_null	case_item / conditional_statement / procedural_timing_control_statement / task_declaration / wait_statement
strength0	drive_strength / pulldown_strength / pullup_strength
strength1	drive_strength / pulldown_strength / pullup_strength
string	constant_expression / expression
system_task_enable	statement
system_task_name	system_task_enable
system_timing_check	specify_item
task_declaration	module_item_declaration
task_enable	statement
task_item_declaration	task_declaration
time_declaration	block_item_declaration / module_item_declaration
timing_check_condition	controlled_timing_check_event / timing_check_event
timing_check_event	system_timing_check
timing_check_event_control	controlled_timing_check_event / timing_check_event
timing_check_limit	system_timing_check
udp_body	udp_declaration
udp_declaration	description
udp_initial_statement	sequencial_body
udp_instance	udp_instantiation
udp_instantiation	module_item
udp_port_declaration	udp_declaration
udp_port_list	udp_declaration
unary_operator	constant_expression / expression
unsigned_number	decimal_number / delay_value / real_number / size
wait_statement	statement
comment	Not used in any production

Lookahead-1 Parser First Token

A	B	C	D	E	F	G	H	I	J	K	L	M	N	O	P	Q	R	S	T	U	V	W	X	Y	Z

Start symbol = source_text

Name First Tokens

always_construct 'always'
binary_base "'B"
"'b"
binary_digit '0'
'1'
'X'
'Z'
'x'
'z'
binary_number "'B"
"'SB"
"'Sb"
"'b"
"'sB"
"'sb"
'0'
'1'
'2'
'3'
'4'
'5'
'6'
'7'
'8'
'9'
binary_operator '!='
'!=='
'%'
'&&'
'&'
'*'
'**'
'+'
'-'
'/'
'<'
'<<'
'<<<'
'<='
'=='
'==='
'>'
'>='
'>>'
'>>>'
'^'
'^~'
'|'
'||'
'~^'
block_item_declaration 'event'
'integer'
'localparam'
'parameter'
'real'
'realtime'
'reg'
'time'
blocking_assignment '\'
'{'
ALPHA
case_item "'B"
"'D"
"'H"
"'O"
"'SB"
"'SD"
"'SH"
"'SO"
"'Sb"
"'Sd"
"'Sh"
"'So"
"'b"
"'d"
"'h"
"'o"
"'sB"
"'sD"
"'sH"
"'sO"
"'sb"
"'sd"
"'sh"
"'so"
'!'
'"'
'$'
'&'
'('
'+'
'-'
'0'
'1'
'2'
'3'
'4'
'5'
'6'
'7'
'8'
'9'
'\'
'^'
'^~'
'default'
'{'
'|'
'~&'
'~'
'~^'
'~|'
ALPHA
case_statement 'case'
'casex'
'casez'
charge_strength '('
cmos_switch_instance '('
'\'
ALPHA
cmos_switchtype 'cmos'
'rcmos'
combinational_body 'table'
combinational_entry '0'
'1'
'?'
'B'
'X'
'b'
'x'
comment '/*'
'//'
concatenation '{'
conditional_statement 'if'
constant_expression "'B"
"'D"
"'H"
"'O"
"'SB"
"'SD"
"'SH"
"'SO"
"'Sb"
"'Sd"
"'Sh"
"'So"
"'b"
"'d"
"'h"
"'o"
"'sB"
"'sD"
"'sH"
"'sO"
"'sb"
"'sd"
"'sh"
"'so"
'!'
'"'
'&'
'+'
'-'
'0'
'1'
'2'
'3'
'4'
'5'
'6'
'7'
'8'
'9'
'\'
'^'
'^~'
'{'
'|'
'~&'
'~'
'~^'
'~|'
ALPHA
constant_mintypmax_expression "'B"
"'D"
"'H"
"'O"
"'SB"
"'SD"
"'SH"
"'SO"
"'Sb"
"'Sd"
"'Sh"
"'So"
"'b"
"'d"
"'h"
"'o"
"'sB"
"'sD"
"'sH"
"'sO"
"'sb"
"'sd"
"'sh"
"'so"
'!'
'"'
'&'
'+'
'-'
'0'
'1'
'2'
'3'
'4'
'5'
'6'
'7'
'8'
'9'
'\'
'^'
'^~'
'{'
'|'
'~&'
'~'
'~^'
'~|'
ALPHA
constant_primary "'B"
"'D"
"'H"
"'O"
"'SB"
"'SD"
"'SH"
"'SO"
"'Sb"
"'Sd"
"'Sh"
"'So"
"'b"
"'d"
"'h"
"'o"
"'sB"
"'sD"
"'sH"
"'sO"
"'sb"
"'sd"
"'sh"
"'so"
'+'
'-'
'0'
'1'
'2'
'3'
'4'
'5'
'6'
'7'
'8'
'9'
'\'
'{'
ALPHA
continuous_assign 'assign'
controlled_timing_check_event 'edge'
'negedge'
'posedge'
current_state '0'
'1'
'?'
'B'
'X'
'b'
'x'
data_source_expression "'B"
"'D"
"'H"
"'O"
"'SB"
"'SD"
"'SH"
"'SO"
"'Sb"
"'Sd"
"'Sh"
"'So"
"'b"
"'d"
"'h"
"'o"
"'sB"
"'sD"
"'sH"
"'sO"
"'sb"
"'sd"
"'sh"
"'so"
'!'
'"'
'$'
'&'
'('
'+'
'-'
'0'
'1'
'2'
'3'
'4'
'5'
'6'
'7'
'8'
'9'
'\'
'^'
'^~'
'{'
'|'
'~&'
'~'
'~^'
'~|'
ALPHA
decimal_base "'D"
"'d"
decimal_digit '0'
'1'
'2'
'3'
'4'
'5'
'6'
'7'
'8'
'9'
decimal_number "'D"
"'SD"
"'Sd"
"'d"
"'sD"
"'sd"
'+'
'-'
'0'
'1'
'2'
'3'
'4'
'5'
'6'
'7'
'8'
'9'
delay2 '#'
delay3 '#'
delay_control '#'
delay_or_event_control '#'
'@'
'repeat'
delay_value "'B"
"'D"
"'H"
"'O"
"'SB"
"'SD"
"'SH"
"'SO"
"'Sb"
"'Sd"
"'Sh"
"'So"
"'b"
"'d"
"'h"
"'o"
"'sB"
"'sD"
"'sH"
"'sO"
"'sb"
"'sd"
"'sh"
"'so"
'!'
'"'
'&'
'+'
'-'
'0'
'1'
'2'
'3'
'4'
'5'
'6'
'7'
'8'
'9'
'\'
'^'
'^~'
'{'
'|'
'~&'
'~'
'~^'
'~|'
ALPHA
description 'macromodule'
'module'
'primitive'
disable_statement 'disable'
drive_strength '('
edge_control_specifier 'edge'
edge_descriptor '01'
'0x'
'10'
'1x'
'x0'
'x1'
edge_identifier 'negedge'
'posedge'
edge_indicator '('
'*'
'F'
'N'
'P'
'R'
'f'
'n'
'p'
'r'
edge_input_list '('
'*'
'0'
'1'
'?'
'B'
'F'
'N'
'P'
'R'
'X'
'b'
'f'
'n'
'p'
'r'
'x'
edge_sensitive_path_declaration '('
edge_symbol '*'
'F'
'N'
'P'
'R'
'f'
'n'
'p'
'r'
enable_gate_instance '('
'\'
ALPHA
enable_gatetype 'bufif0'
'bufif1'
'notif0'
'notif1'
enable_terminal "'B"
"'D"
"'H"
"'O"
"'SB"
"'SD"
"'SH"
"'SO"
"'Sb"
"'Sd"
"'Sh"
"'So"
"'b"
"'d"
"'h"
"'o"
"'sB"
"'sD"
"'sH"
"'sO"
"'sb"
"'sd"
"'sh"
"'so"
'!'
'"'
'$'
'&'
'('
'+'
'-'
'0'
'1'
'2'
'3'
'4'
'5'
'6'
'7'
'8'
'9'
'\'
'^'
'^~'
'{'
'|'
'~&'
'~'
'~^'
'~|'
ALPHA
escaped_identifier '\'
event_control '@'
event_declaration 'event'
event_expression "'B"
"'D"
"'H"
"'O"
"'SB"
"'SD"
"'SH"
"'SO"
"'Sb"
"'Sd"
"'Sh"
"'So"
"'b"
"'d"
"'h"
"'o"
"'sB"
"'sD"
"'sH"
"'sO"
"'sb"
"'sd"
"'sh"
"'so"
'!'
'"'
'$'
'&'
'('
'+'
'-'
'0'
'1'
'2'
'3'
'4'
'5'
'6'
'7'
'8'
'9'
'\'
'^'
'^~'
'negedge'
'posedge'
'{'
'|'
'~&'
'~'
'~^'
'~|'
ALPHA
event_trigger '->'
expression "'B"
"'D"
"'H"
"'O"
"'SB"
"'SD"
"'SH"
"'SO"
"'Sb"
"'Sd"
"'Sh"
"'So"
"'b"
"'d"
"'h"
"'o"
"'sB"
"'sD"
"'sH"
"'sO"
"'sb"
"'sd"
"'sh"
"'so"
'!'
'"'
'$'
'&'
'('
'+'
'-'
'0'
'1'
'2'
'3'
'4'
'5'
'6'
'7'
'8'
'9'
'\'
'^'
'^~'
'{'
'|'
'~&'
'~'
'~^'
'~|'
ALPHA
full_edge_sensitive_path_description '('
full_path_description '('
function_call '$'
'\'
ALPHA
function_declaration 'function'
function_item_declaration 'event'
'input'
'integer'
'localparam'
'parameter'
'real'
'realtime'
'reg'
'time'
gate_instantiation 'and'
'buf'
'bufif0'
'bufif1'
'cmos'
'nand'
'nmos'
'nor'
'not'
'notif0'
'notif1'
'or'
'pmos'
'pulldown'
'pullup'
'rcmos'
'rnmos'
'rpmos'
'rtran'
'rtranif0'
'rtranif1'
'tran'
'tranif0'
'tranif1'
'xnor'
'xor'
hex_base "'H"
"'h"
hex_digit '0'
'1'
'2'
'3'
'4'
'5'
'6'
'7'
'8'
'9'
'A'
'B'
'C'
'D'
'E'
'F'
'X'
'Z'
'a'
'b'
'c'
'd'
'e'
'f'
'x'
'z'
hex_number "'H"
"'SH"
"'Sh"
"'h"
"'sH"
"'sh"
'0'
'1'
'2'
'3'
'4'
'5'
'6'
'7'
'8'
'9'
identifier '\'
ALPHA
init_val "1'B0"
"1'B1"
"1'BX"
"1'Bx"
"1'b0"
"1'b1"
"1'bX"
"1'bx"
'0'
'1'
initial_construct 'initial'
inout_declaration 'inout'
inout_terminal '\'
ALPHA
input_declaration 'input'
input_identifier '\'
ALPHA
input_terminal "'B"
"'D"
"'H"
"'O"
"'SB"
"'SD"
"'SH"
"'SO"
"'Sb"
"'Sd"
"'Sh"
"'So"
"'b"
"'d"
"'h"
"'o"
"'sB"
"'sD"
"'sH"
"'sO"
"'sb"
"'sd"
"'sh"
"'so"
'!'
'"'
'$'
'&'
'('
'+'
'-'
'0'
'1'
'2'
'3'
'4'
'5'
'6'
'7'
'8'
'9'
'\'
'^'
'^~'
'{'
'|'
'~&'
'~'
'~^'
'~|'
ALPHA
integer_declaration 'integer'
level_input_list '0'
'1'
'?'
'B'
'X'
'b'
'x'
level_symbol '0'
'1'
'?'
'B'
'X'
'b'
'x'
limit_value "'B"
"'D"
"'H"
"'O"
"'SB"
"'SD"
"'SH"
"'SO"
"'Sb"
"'Sd"
"'Sh"
"'So"
"'b"
"'d"
"'h"
"'o"
"'sB"
"'sD"
"'sH"
"'sO"
"'sb"
"'sd"
"'sh"
"'so"
'!'
'"'
'&'
'+'
'-'
'0'
'1'
'2'
'3'
'4'
'5'
'6'
'7'
'8'
'9'
'\'
'^'
'^~'
'{'
'|'
'~&'
'~'
'~^'
'~|'
ALPHA
list_of_module_connections ø
"'B"
"'D"
"'H"
"'O"
"'SB"
"'SD"
"'SH"
"'SO"
"'Sb"
"'Sd"
"'Sh"
"'So"
"'b"
"'d"
"'h"
"'o"
"'sB"
"'sD"
"'sH"
"'sO"
"'sb"
"'sd"
"'sh"
"'so"
'!'
'"'
'$'
'&'
'('
'+'
','
'-'
'.'
'0'
'1'
'2'
'3'
'4'
'5'
'6'
'7'
'8'
'9'
'\'
'^'
'^~'
'{'
'|'
'~&'
'~'
'~^'
'~|'
ALPHA
list_of_net_assignments '\'
'{'
ALPHA
list_of_net_decl_assignments '\'
ALPHA
list_of_net_identifiers '\'
ALPHA
list_of_param_assignments '\'
ALPHA
list_of_path_delay_expressions "'B"
"'D"
"'H"
"'O"
"'SB"
"'SD"
"'SH"
"'SO"
"'Sb"
"'Sd"
"'Sh"
"'So"
"'b"
"'d"
"'h"
"'o"
"'sB"
"'sD"
"'sH"
"'sO"
"'sb"
"'sd"
"'sh"
"'so"
'!'
'"'
'&'
'+'
'-'
'0'
'1'
'2'
'3'
'4'
'5'
'6'
'7'
'8'
'9'
'\'
'^'
'^~'
'{'
'|'
'~&'
'~'
'~^'
'~|'
ALPHA
list_of_path_inputs '\'
ALPHA
list_of_path_outputs '\'
ALPHA
list_of_port_identifiers '\'
ALPHA
list_of_ports '('
list_of_real_identifiers '\'
ALPHA
list_of_register_identifiers '\'
ALPHA
list_of_specparam_assignments 'PATHPULSE$'
'\'
ALPHA
long_comment '/*'
loop_statement 'for'
'forever'
'repeat'
'while'
mintypmax_expression "'B"
"'D"
"'H"
"'O"
"'SB"
"'SD"
"'SH"
"'SO"
"'Sb"
"'Sd"
"'Sh"
"'So"
"'b"
"'d"
"'h"
"'o"
"'sB"
"'sD"
"'sH"
"'sO"
"'sb"
"'sd"
"'sh"
"'so"
'!'
'"'
'$'
'&'
'('
'+'
'-'
'0'
'1'
'2'
'3'
'4'
'5'
'6'
'7'
'8'
'9'
'\'
'^'
'^~'
'{'
'|'
'~&'
'~'
'~^'
'~|'
ALPHA
module_declaration 'macromodule'
'module'
module_instance '\'
ALPHA
module_instantiation '\'
ALPHA
module_item '\'
'always'
'and'
'assign'
'buf'
'bufif0'
'bufif1'
'cmos'
'defparam'
'event'
'function'
'initial'
'inout'
'input'
'integer'
'localparam'
'nand'
'nmos'
'nor'
'not'
'notif0'
'notif1'
'or'
'output'
'parameter'
'pmos'
'pulldown'
'pullup'
'rcmos'
'real'
'realtime'
'reg'
'rnmos'
'rpmos'
'rtran'
'rtranif0'
'rtranif1'
'specify'
'supply0'
'supply1'
'task'
'time'
'tran'
'tranif0'
'tranif1'
'tri'
'tri0'
'tri1'
'triand'
'trior'
'trireg'
'wand'
'wire'
'wor'
'xnor'
'xor'
ALPHA
module_item_declaration 'event'
'function'
'inout'
'input'
'integer'
'localparam'
'output'
'parameter'
'real'
'realtime'
'reg'
'supply0'
'supply1'
'task'
'time'
'tri'
'tri0'
'tri1'
'triand'
'trior'
'trireg'
'wand'
'wire'
'wor'
module_keyword 'macromodule'
'module'
mos_switch_instance '('
'\'
ALPHA
mos_switchtype 'nmos'
'pmos'
'rnmos'
'rpmos'
multiple_concatenation '{'
n_input_gate_instance '('
'\'
ALPHA
n_input_gatetype 'and'
'nand'
'nor'
'or'
'xnor'
'xor'
n_output_gate_instance '('
'\'
ALPHA
n_output_gatetype 'buf'
'not'
name_of_gate_instance '\'
ALPHA
name_of_instance '\'
ALPHA
name_of_system_function '$'
name_of_udp_instance '\'
ALPHA
named_port_connection '.'
ncontrol_terminal "'B"
"'D"
"'H"
"'O"
"'SB"
"'SD"
"'SH"
"'SO"
"'Sb"
"'Sd"
"'Sh"
"'So"
"'b"
"'d"
"'h"
"'o"
"'sB"
"'sD"
"'sH"
"'sO"
"'sb"
"'sd"
"'sh"
"'so"
'!'
'"'
'$'
'&'
'('
'+'
'-'
'0'
'1'
'2'
'3'
'4'
'5'
'6'
'7'
'8'
'9'
'\'
'^'
'^~'
'{'
'|'
'~&'
'~'
'~^'
'~|'
ALPHA
net_assignment '\'
'{'
ALPHA
net_decl_assignment '\'
ALPHA
net_declaration 'supply0'
'supply1'
'tri'
'tri0'
'tri1'
'triand'
'trior'
'trireg'
'wand'
'wire'
'wor'
net_lvalue '\'
'{'
ALPHA
net_type 'supply0'
'supply1'
'tri'
'tri0'
'tri1'
'triand'
'trior'
'wand'
'wire'
'wor'
next_state '-'
'0'
'1'
'X'
'x'
non_blocking_assignment '\'
'{'
ALPHA
notify_register '\'
ALPHA
number "'B"
"'D"
"'H"
"'O"
"'SB"
"'SD"
"'SH"
"'SO"
"'Sb"
"'Sd"
"'Sh"
"'So"
"'b"
"'d"
"'h"
"'o"
"'sB"
"'sD"
"'sH"
"'sO"
"'sb"
"'sd"
"'sh"
"'so"
'+'
'-'
'0'
'1'
'2'
'3'
'4'
'5'
'6'
'7'
'8'
'9'
octal_base "'O"
"'o"
octal_digit '0'
'1'
'2'
'3'
'4'
'5'
'6'
'7'
'X'
'Z'
'x'
'z'
octal_number "'O"
"'SO"
"'So"
"'o"
"'sO"
"'so"
'0'
'1'
'2'
'3'
'4'
'5'
'6'
'7'
'8'
'9'
ordered_port_connection ø
"'B"
"'D"
"'H"
"'O"
"'SB"
"'SD"
"'SH"
"'SO"
"'Sb"
"'Sd"
"'Sh"
"'So"
"'b"
"'d"
"'h"
"'o"
"'sB"
"'sD"
"'sH"
"'sO"
"'sb"
"'sd"
"'sh"
"'so"
'!'
'"'
'$'
'&'
'('
'+'
'-'
'0'
'1'
'2'
'3'
'4'
'5'
'6'
'7'
'8'
'9'
'\'
'^'
'^~'
'{'
'|'
'~&'
'~'
'~^'
'~|'
ALPHA
output_declaration 'output'
output_identifier '\'
ALPHA
output_symbol '0'
'1'
'X'
'x'
output_terminal '\'
ALPHA
par_block 'fork'
parallel_edge_sensitive_path_description '('
parallel_path_description '('
param_assignment '\'
ALPHA
parameter_declaration 'localparam'
'parameter'
parameter_override 'defparam'
parameter_value_assignment '#'
pass_en_switch_instance '('
'\'
ALPHA
pass_en_switchtype 'rtranif0'
'rtranif1'
'tranif0'
'tranif1'
pass_switch_instance '('
'\'
ALPHA
pass_switchtype 'rtran'
'tran'
path_declaration '('
'if'
'ifnone'
path_delay_expression "'B"
"'D"
"'H"
"'O"
"'SB"
"'SD"
"'SH"
"'SO"
"'Sb"
"'Sd"
"'Sh"
"'So"
"'b"
"'d"
"'h"
"'o"
"'sB"
"'sD"
"'sH"
"'sO"
"'sb"
"'sd"
"'sh"
"'so"
'!'
'"'
'&'
'+'
'-'
'0'
'1'
'2'
'3'
'4'
'5'
'6'
'7'
'8'
'9'
'\'
'^'
'^~'
'{'
'|'
'~&'
'~'
'~^'
'~|'
ALPHA
path_delay_value "'B"
"'D"
"'H"
"'O"
"'SB"
"'SD"
"'SH"
"'SO"
"'Sb"
"'Sd"
"'Sh"
"'So"
"'b"
"'d"
"'h"
"'o"
"'sB"
"'sD"
"'sH"
"'sO"
"'sb"
"'sd"
"'sh"
"'so"
'!'
'"'
'&'
'('
'+'
'-'
'0'
'1'
'2'
'3'
'4'
'5'
'6'
'7'
'8'
'9'
'\'
'^'
'^~'
'{'
'|'
'~&'
'~'
'~^'
'~|'
ALPHA
pcontrol_terminal "'B"
"'D"
"'H"
"'O"
"'SB"
"'SD"
"'SH"
"'SO"
"'Sb"
"'Sd"
"'Sh"
"'So"
"'b"
"'d"
"'h"
"'o"
"'sB"
"'sD"
"'sH"
"'sO"
"'sb"
"'sd"
"'sh"
"'so"
'!'
'"'
'$'
'&'
'('
'+'
'-'
'0'
'1'
'2'
'3'
'4'
'5'
'6'
'7'
'8'
'9'
'\'
'^'
'^~'
'{'
'|'
'~&'
'~'
'~^'
'~|'
ALPHA
polarity_operator '+'
'-'
port ø
'.'
'\'
'{'
ALPHA
port_direction 'inout'
'input'
'output'
port_expression '\'
'{'
ALPHA
port_reference '\'
ALPHA
primary "'B"
"'D"
"'H"
"'O"
"'SB"
"'SD"
"'SH"
"'SO"
"'Sb"
"'Sd"
"'Sh"
"'So"
"'b"
"'d"
"'h"
"'o"
"'sB"
"'sD"
"'sH"
"'sO"
"'sb"
"'sd"
"'sh"
"'so"
'$'
'('
'+'
'-'
'0'
'1'
'2'
'3'
'4'
'5'
'6'
'7'
'8'
'9'
'\'
'{'
ALPHA
procedural_continuous_assignment 'assign'
'deassign'
'force'
'release'
procedural_timing_control_statement '#'
'@'
'repeat'
pull_gate_instance '('
'\'
ALPHA
pulldown_strength '('
pullup_strength '('
pulse_control_specparam 'PATHPULSE$'
range '['
range_or_type '['
'integer'
'real'
'realtime'
'time'
real_declaration 'real'
real_number '+'
'-'
'0'
'1'
'2'
'3'
'4'
'5'
'6'
'7'
'8'
'9'
realtime_declaration 'realtime'
reg_assignment '\'
'{'
ALPHA
reg_declaration 'reg'
reg_lvalue '\'
'{'
ALPHA
register_name '\'
ALPHA
scalar_constant "'B0"
"'B1"
"'b0"
"'b1"
"1'B0"
"1'B1"
"1'b0"
"1'b1"
'0'
'1'
scalar_timing_check_condition "'B"
"'D"
"'H"
"'O"
"'SB"
"'SD"
"'SH"
"'SO"
"'Sb"
"'Sd"
"'Sh"
"'So"
"'b"
"'d"
"'h"
"'o"
"'sB"
"'sD"
"'sH"
"'sO"
"'sb"
"'sd"
"'sh"
"'so"
'!'
'"'
'$'
'&'
'('
'+'
'-'
'0'
'1'
'2'
'3'
'4'
'5'
'6'
'7'
'8'
'9'
'\'
'^'
'^~'
'{'
'|'
'~&'
'~'
'~^'
'~|'
ALPHA
seq_block 'begin'
seq_input_list '('
'*'
'0'
'1'
'?'
'B'
'F'
'N'
'P'
'R'
'X'
'b'
'f'
'n'
'p'
'r'
'x'
sequencial_body 'initial'
'table'
sequencial_entry '('
'*'
'0'
'1'
'?'
'B'
'F'
'N'
'P'
'R'
'X'
'b'
'f'
'n'
'p'
'r'
'x'
short_comment '//'
sign '+'
'-'
signed_binary_base "'SB"
"'Sb"
"'sB"
"'sb"
signed_decimal_base "'SD"
"'Sd"
"'sD"
"'sd"
signed_hex_base "'SH"
"'Sh"
"'sH"
"'sh"
signed_octal_base "'SO"
"'So"
"'sO"
"'so"
simple_identifier ALPHA
simple_path_declaration '('
single_identifier '\'
ALPHA
size '0'
'1'
'2'
'3'
'4'
'5'
'6'
'7'
'8'
'9'
source_text ø
'macromodule'
'module'
'primitive'
specify_block 'specify'
specify_input_terminal_descriptor '\'
ALPHA
specify_item '$hold'
'$period'
'$recovery'
'$setup'
'$setuphold'
'$skew'
'$width'
'('
'if'
'ifnone'
'specparam'
specify_output_terminal_descriptor '\'
ALPHA
specify_terminal_descriptor '\'
ALPHA
specparam_assignment 'PATHPULSE$'
'\'
ALPHA
specparam_declaration 'specparam'
state_dependent_path_declaration 'if'
'ifnone'
statement '#'
'$'
'->'
'@'
'\'
'assign'
'begin'
'case'
'casex'
'casez'
'deassign'
'disable'
'for'
'force'
'forever'
'fork'
'if'
'release'
'repeat'
'wait'
'while'
'{'
ALPHA
statement_or_null '#'
'$'
'->'
';'
'@'
'\'
'assign'
'begin'
'case'
'casex'
'casez'
'deassign'
'disable'
'for'
'force'
'forever'
'fork'
'if'
'release'
'repeat'
'wait'
'while'
'{'
ALPHA
strength0 'pull0'
'strong0'
'supply0'
'weak0'
strength1 'pull1'
'strong1'
'supply1'
'weak1'
string '"'
system_task_enable '$'
system_task_name '$'
system_timing_check '$hold'
'$period'
'$recovery'
'$setup'
'$setuphold'
'$skew'
'$width'
task_declaration 'task'
task_enable '\'
ALPHA
task_item_declaration 'event'
'inout'
'input'
'integer'
'localparam'
'output'
'parameter'
'real'
'realtime'
'reg'
'time'
time_declaration 'time'
timing_check_condition "'B"
"'D"
"'H"
"'O"
"'SB"
"'SD"
"'SH"
"'SO"
"'Sb"
"'Sd"
"'Sh"
"'So"
"'b"
"'d"
"'h"
"'o"
"'sB"
"'sD"
"'sH"
"'sO"
"'sb"
"'sd"
"'sh"
"'so"
'!'
'"'
'$'
'&'
'('
'+'
'-'
'0'
'1'
'2'
'3'
'4'
'5'
'6'
'7'
'8'
'9'
'\'
'^'
'^~'
'{'
'|'
'~&'
'~'
'~^'
'~|'
ALPHA
timing_check_event '\'
'edge'
'negedge'
'posedge'
ALPHA
timing_check_event_control 'edge'
'negedge'
'posedge'
timing_check_limit "'B"
"'D"
"'H"
"'O"
"'SB"
"'SD"
"'SH"
"'SO"
"'Sb"
"'Sd"
"'Sh"
"'So"
"'b"
"'d"
"'h"
"'o"
"'sB"
"'sD"
"'sH"
"'sO"
"'sb"
"'sd"
"'sh"
"'so"
'!'
'"'
'$'
'&'
'('
'+'
'-'
'0'
'1'
'2'
'3'
'4'
'5'
'6'
'7'
'8'
'9'
'\'
'^'
'^~'
'{'
'|'
'~&'
'~'
'~^'
'~|'
ALPHA
udp_body 'initial'
'table'
udp_declaration 'primitive'
udp_initial_statement 'initial'
udp_instance '('
'\'
ALPHA
udp_instantiation '\'
ALPHA
udp_port_declaration 'input'
'output'
'reg'
udp_port_list '\'
ALPHA
unary_operator '!'
'&'
'+'
'-'
'^'
'^~'
'|'
'~&'
'~'
'~^'
'~|'
unsigned_number '0'
'1'
'2'
'3'
'4'
'5'
'6'
'7'
'8'
'9'
wait_statement 'wait'

Name	First Tokens
always_construct	`'always'`
binary_base	`"'B"` `"'b"`
binary_digit	`'0'` `'1'` `'X'` `'Z'` `'x'` `'z'`
binary_number	`"'B"` `"'SB"` `"'Sb"` `"'b"` `"'sB"` `"'sb"` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'`
binary_operator	`'!='` `'!=='` `'%'` `'&&'` `'&'` *`''` `''` `'+'` `'-'` `'/'` `'<'` `'<<'` `'<<<'` `'<='` `'=='` `'==='` `'>'` `'>='` `'>>'` `'>>>'` `'^'` `'^~'` `'\|'` `'\|\|'` `'~^'`
block_item_declaration	`'event'` `'integer'` `'localparam'` `'parameter'` `'real'` `'realtime'` `'reg'` `'time'`
blocking_assignment	`'\'` `'{'` `ALPHA`
case_item	`"'B"` `"'D"` `"'H"` `"'O"` `"'SB"` `"'SD"` `"'SH"` `"'SO"` `"'Sb"` `"'Sd"` `"'Sh"` `"'So"` `"'b"` `"'d"` `"'h"` `"'o"` `"'sB"` `"'sD"` `"'sH"` `"'sO"` `"'sb"` `"'sd"` `"'sh"` `"'so"` `'!'` `'"'` `'$'` `'&'` `'('` `'+'` `'-'` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'` `'\'` `'^'` `'^~'` `'default'` `'{'` `'\|'` `'~&'` `'~'` `'~^'` `'~\|'` `ALPHA`
case_statement	`'case'` `'casex'` `'casez'`
charge_strength	`'('`
cmos_switch_instance	`'('` `'\'` `ALPHA`
cmos_switchtype	`'cmos'` `'rcmos'`
combinational_body	`'table'`
combinational_entry	`'0'` `'1'` `'?'` `'B'` `'X'` `'b'` `'x'`
comment	*`'/'` `'//'`**
concatenation	`'{'`
conditional_statement	`'if'`
constant_expression	`"'B"` `"'D"` `"'H"` `"'O"` `"'SB"` `"'SD"` `"'SH"` `"'SO"` `"'Sb"` `"'Sd"` `"'Sh"` `"'So"` `"'b"` `"'d"` `"'h"` `"'o"` `"'sB"` `"'sD"` `"'sH"` `"'sO"` `"'sb"` `"'sd"` `"'sh"` `"'so"` `'!'` `'"'` `'&'` `'+'` `'-'` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'` `'\'` `'^'` `'^~'` `'{'` `'\|'` `'~&'` `'~'` `'~^'` `'~\|'` `ALPHA`
constant_mintypmax_expression	`"'B"` `"'D"` `"'H"` `"'O"` `"'SB"` `"'SD"` `"'SH"` `"'SO"` `"'Sb"` `"'Sd"` `"'Sh"` `"'So"` `"'b"` `"'d"` `"'h"` `"'o"` `"'sB"` `"'sD"` `"'sH"` `"'sO"` `"'sb"` `"'sd"` `"'sh"` `"'so"` `'!'` `'"'` `'&'` `'+'` `'-'` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'` `'\'` `'^'` `'^~'` `'{'` `'\|'` `'~&'` `'~'` `'~^'` `'~\|'` `ALPHA`
constant_primary	`"'B"` `"'D"` `"'H"` `"'O"` `"'SB"` `"'SD"` `"'SH"` `"'SO"` `"'Sb"` `"'Sd"` `"'Sh"` `"'So"` `"'b"` `"'d"` `"'h"` `"'o"` `"'sB"` `"'sD"` `"'sH"` `"'sO"` `"'sb"` `"'sd"` `"'sh"` `"'so"` `'+'` `'-'` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'` `'\'` `'{'` `ALPHA`
continuous_assign	`'assign'`
controlled_timing_check_event	`'edge'` `'negedge'` `'posedge'`
current_state	`'0'` `'1'` `'?'` `'B'` `'X'` `'b'` `'x'`
data_source_expression	`"'B"` `"'D"` `"'H"` `"'O"` `"'SB"` `"'SD"` `"'SH"` `"'SO"` `"'Sb"` `"'Sd"` `"'Sh"` `"'So"` `"'b"` `"'d"` `"'h"` `"'o"` `"'sB"` `"'sD"` `"'sH"` `"'sO"` `"'sb"` `"'sd"` `"'sh"` `"'so"` `'!'` `'"'` `'$'` `'&'` `'('` `'+'` `'-'` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'` `'\'` `'^'` `'^~'` `'{'` `'\|'` `'~&'` `'~'` `'~^'` `'~\|'` `ALPHA`
decimal_base	`"'D"` `"'d"`
decimal_digit	`'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'`
decimal_number	`"'D"` `"'SD"` `"'Sd"` `"'d"` `"'sD"` `"'sd"` `'+'` `'-'` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'`
delay2	`'#'`
delay3	`'#'`
delay_control	`'#'`
delay_or_event_control	`'#'` `'@'` `'repeat'`
delay_value	`"'B"` `"'D"` `"'H"` `"'O"` `"'SB"` `"'SD"` `"'SH"` `"'SO"` `"'Sb"` `"'Sd"` `"'Sh"` `"'So"` `"'b"` `"'d"` `"'h"` `"'o"` `"'sB"` `"'sD"` `"'sH"` `"'sO"` `"'sb"` `"'sd"` `"'sh"` `"'so"` `'!'` `'"'` `'&'` `'+'` `'-'` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'` `'\'` `'^'` `'^~'` `'{'` `'\|'` `'~&'` `'~'` `'~^'` `'~\|'` `ALPHA`
description	`'macromodule'` `'module'` `'primitive'`
disable_statement	`'disable'`
drive_strength	`'('`
edge_control_specifier	`'edge'`
edge_descriptor	`'01'` `'0x'` `'10'` `'1x'` `'x0'` `'x1'`
edge_identifier	`'negedge'` `'posedge'`
edge_indicator	`'('` *`''` `'F'` `'N'` `'P'` `'R'` `'f'` `'n'` `'p'` `'r'`**
edge_input_list	`'('` *`''` `'0'` `'1'` `'?'` `'B'` `'F'` `'N'` `'P'` `'R'` `'X'` `'b'` `'f'` `'n'` `'p'` `'r'` `'x'`**
edge_sensitive_path_declaration	`'('`
edge_symbol	*`''` `'F'` `'N'` `'P'` `'R'` `'f'` `'n'` `'p'` `'r'`**
enable_gate_instance	`'('` `'\'` `ALPHA`
enable_gatetype	`'bufif0'` `'bufif1'` `'notif0'` `'notif1'`
enable_terminal	`"'B"` `"'D"` `"'H"` `"'O"` `"'SB"` `"'SD"` `"'SH"` `"'SO"` `"'Sb"` `"'Sd"` `"'Sh"` `"'So"` `"'b"` `"'d"` `"'h"` `"'o"` `"'sB"` `"'sD"` `"'sH"` `"'sO"` `"'sb"` `"'sd"` `"'sh"` `"'so"` `'!'` `'"'` `'$'` `'&'` `'('` `'+'` `'-'` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'` `'\'` `'^'` `'^~'` `'{'` `'\|'` `'~&'` `'~'` `'~^'` `'~\|'` `ALPHA`
escaped_identifier	`'\'`
event_control	`'@'`
event_declaration	`'event'`
event_expression	`"'B"` `"'D"` `"'H"` `"'O"` `"'SB"` `"'SD"` `"'SH"` `"'SO"` `"'Sb"` `"'Sd"` `"'Sh"` `"'So"` `"'b"` `"'d"` `"'h"` `"'o"` `"'sB"` `"'sD"` `"'sH"` `"'sO"` `"'sb"` `"'sd"` `"'sh"` `"'so"` `'!'` `'"'` `'$'` `'&'` `'('` `'+'` `'-'` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'` `'\'` `'^'` `'^~'` `'negedge'` `'posedge'` `'{'` `'\|'` `'~&'` `'~'` `'~^'` `'~\|'` `ALPHA`
event_trigger	`'->'`
expression	`"'B"` `"'D"` `"'H"` `"'O"` `"'SB"` `"'SD"` `"'SH"` `"'SO"` `"'Sb"` `"'Sd"` `"'Sh"` `"'So"` `"'b"` `"'d"` `"'h"` `"'o"` `"'sB"` `"'sD"` `"'sH"` `"'sO"` `"'sb"` `"'sd"` `"'sh"` `"'so"` `'!'` `'"'` `'$'` `'&'` `'('` `'+'` `'-'` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'` `'\'` `'^'` `'^~'` `'{'` `'\|'` `'~&'` `'~'` `'~^'` `'~\|'` `ALPHA`
full_edge_sensitive_path_description	`'('`
full_path_description	`'('`
function_call	`'$'` `'\'` `ALPHA`
function_declaration	`'function'`
function_item_declaration	`'event'` `'input'` `'integer'` `'localparam'` `'parameter'` `'real'` `'realtime'` `'reg'` `'time'`
gate_instantiation	`'and'` `'buf'` `'bufif0'` `'bufif1'` `'cmos'` `'nand'` `'nmos'` `'nor'` `'not'` `'notif0'` `'notif1'` `'or'` `'pmos'` `'pulldown'` `'pullup'` `'rcmos'` `'rnmos'` `'rpmos'` `'rtran'` `'rtranif0'` `'rtranif1'` `'tran'` `'tranif0'` `'tranif1'` `'xnor'` `'xor'`
hex_base	`"'H"` `"'h"`
hex_digit	`'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'` `'A'` `'B'` `'C'` `'D'` `'E'` `'F'` `'X'` `'Z'` `'a'` `'b'` `'c'` `'d'` `'e'` `'f'` `'x'` `'z'`
hex_number	`"'H"` `"'SH"` `"'Sh"` `"'h"` `"'sH"` `"'sh"` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'`
identifier	`'\'` `ALPHA`
init_val	`"1'B0"` `"1'B1"` `"1'BX"` `"1'Bx"` `"1'b0"` `"1'b1"` `"1'bX"` `"1'bx"` `'0'` `'1'`
initial_construct	`'initial'`
inout_declaration	`'inout'`
inout_terminal	`'\'` `ALPHA`
input_declaration	`'input'`
input_identifier	`'\'` `ALPHA`
input_terminal	`"'B"` `"'D"` `"'H"` `"'O"` `"'SB"` `"'SD"` `"'SH"` `"'SO"` `"'Sb"` `"'Sd"` `"'Sh"` `"'So"` `"'b"` `"'d"` `"'h"` `"'o"` `"'sB"` `"'sD"` `"'sH"` `"'sO"` `"'sb"` `"'sd"` `"'sh"` `"'so"` `'!'` `'"'` `'$'` `'&'` `'('` `'+'` `'-'` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'` `'\'` `'^'` `'^~'` `'{'` `'\|'` `'~&'` `'~'` `'~^'` `'~\|'` `ALPHA`
integer_declaration	`'integer'`
level_input_list	`'0'` `'1'` `'?'` `'B'` `'X'` `'b'` `'x'`
level_symbol	`'0'` `'1'` `'?'` `'B'` `'X'` `'b'` `'x'`
limit_value	`"'B"` `"'D"` `"'H"` `"'O"` `"'SB"` `"'SD"` `"'SH"` `"'SO"` `"'Sb"` `"'Sd"` `"'Sh"` `"'So"` `"'b"` `"'d"` `"'h"` `"'o"` `"'sB"` `"'sD"` `"'sH"` `"'sO"` `"'sb"` `"'sd"` `"'sh"` `"'so"` `'!'` `'"'` `'&'` `'+'` `'-'` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'` `'\'` `'^'` `'^~'` `'{'` `'\|'` `'~&'` `'~'` `'~^'` `'~\|'` `ALPHA`
list_of_module_connections	`ø` `"'B"` `"'D"` `"'H"` `"'O"` `"'SB"` `"'SD"` `"'SH"` `"'SO"` `"'Sb"` `"'Sd"` `"'Sh"` `"'So"` `"'b"` `"'d"` `"'h"` `"'o"` `"'sB"` `"'sD"` `"'sH"` `"'sO"` `"'sb"` `"'sd"` `"'sh"` `"'so"` `'!'` `'"'` `'$'` `'&'` `'('` `'+'` `','` `'-'` `'.'` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'` `'\'` `'^'` `'^~'` `'{'` `'\|'` `'~&'` `'~'` `'~^'` `'~\|'` `ALPHA`
list_of_net_assignments	`'\'` `'{'` `ALPHA`
list_of_net_decl_assignments	`'\'` `ALPHA`
list_of_net_identifiers	`'\'` `ALPHA`
list_of_param_assignments	`'\'` `ALPHA`
list_of_path_delay_expressions	`"'B"` `"'D"` `"'H"` `"'O"` `"'SB"` `"'SD"` `"'SH"` `"'SO"` `"'Sb"` `"'Sd"` `"'Sh"` `"'So"` `"'b"` `"'d"` `"'h"` `"'o"` `"'sB"` `"'sD"` `"'sH"` `"'sO"` `"'sb"` `"'sd"` `"'sh"` `"'so"` `'!'` `'"'` `'&'` `'+'` `'-'` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'` `'\'` `'^'` `'^~'` `'{'` `'\|'` `'~&'` `'~'` `'~^'` `'~\|'` `ALPHA`
list_of_path_inputs	`'\'` `ALPHA`
list_of_path_outputs	`'\'` `ALPHA`
list_of_port_identifiers	`'\'` `ALPHA`
list_of_ports	`'('`
list_of_real_identifiers	`'\'` `ALPHA`
list_of_register_identifiers	`'\'` `ALPHA`
list_of_specparam_assignments	`'PATHPULSE$'` `'\'` `ALPHA`
long_comment	*`'/'`**
loop_statement	`'for'` `'forever'` `'repeat'` `'while'`
mintypmax_expression	`"'B"` `"'D"` `"'H"` `"'O"` `"'SB"` `"'SD"` `"'SH"` `"'SO"` `"'Sb"` `"'Sd"` `"'Sh"` `"'So"` `"'b"` `"'d"` `"'h"` `"'o"` `"'sB"` `"'sD"` `"'sH"` `"'sO"` `"'sb"` `"'sd"` `"'sh"` `"'so"` `'!'` `'"'` `'$'` `'&'` `'('` `'+'` `'-'` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'` `'\'` `'^'` `'^~'` `'{'` `'\|'` `'~&'` `'~'` `'~^'` `'~\|'` `ALPHA`
module_declaration	`'macromodule'` `'module'`
module_instance	`'\'` `ALPHA`
module_instantiation	`'\'` `ALPHA`
module_item	`'\'` `'always'` `'and'` `'assign'` `'buf'` `'bufif0'` `'bufif1'` `'cmos'` `'defparam'` `'event'` `'function'` `'initial'` `'inout'` `'input'` `'integer'` `'localparam'` `'nand'` `'nmos'` `'nor'` `'not'` `'notif0'` `'notif1'` `'or'` `'output'` `'parameter'` `'pmos'` `'pulldown'` `'pullup'` `'rcmos'` `'real'` `'realtime'` `'reg'` `'rnmos'` `'rpmos'` `'rtran'` `'rtranif0'` `'rtranif1'` `'specify'` `'supply0'` `'supply1'` `'task'` `'time'` `'tran'` `'tranif0'` `'tranif1'` `'tri'` `'tri0'` `'tri1'` `'triand'` `'trior'` `'trireg'` `'wand'` `'wire'` `'wor'` `'xnor'` `'xor'` `ALPHA`
module_item_declaration	`'event'` `'function'` `'inout'` `'input'` `'integer'` `'localparam'` `'output'` `'parameter'` `'real'` `'realtime'` `'reg'` `'supply0'` `'supply1'` `'task'` `'time'` `'tri'` `'tri0'` `'tri1'` `'triand'` `'trior'` `'trireg'` `'wand'` `'wire'` `'wor'`
module_keyword	`'macromodule'` `'module'`
mos_switch_instance	`'('` `'\'` `ALPHA`
mos_switchtype	`'nmos'` `'pmos'` `'rnmos'` `'rpmos'`
multiple_concatenation	`'{'`
n_input_gate_instance	`'('` `'\'` `ALPHA`
n_input_gatetype	`'and'` `'nand'` `'nor'` `'or'` `'xnor'` `'xor'`
n_output_gate_instance	`'('` `'\'` `ALPHA`
n_output_gatetype	`'buf'` `'not'`
name_of_gate_instance	`'\'` `ALPHA`
name_of_instance	`'\'` `ALPHA`
name_of_system_function	`'$'`
name_of_udp_instance	`'\'` `ALPHA`
named_port_connection	`'.'`
ncontrol_terminal	`"'B"` `"'D"` `"'H"` `"'O"` `"'SB"` `"'SD"` `"'SH"` `"'SO"` `"'Sb"` `"'Sd"` `"'Sh"` `"'So"` `"'b"` `"'d"` `"'h"` `"'o"` `"'sB"` `"'sD"` `"'sH"` `"'sO"` `"'sb"` `"'sd"` `"'sh"` `"'so"` `'!'` `'"'` `'$'` `'&'` `'('` `'+'` `'-'` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'` `'\'` `'^'` `'^~'` `'{'` `'\|'` `'~&'` `'~'` `'~^'` `'~\|'` `ALPHA`
net_assignment	`'\'` `'{'` `ALPHA`
net_decl_assignment	`'\'` `ALPHA`
net_declaration	`'supply0'` `'supply1'` `'tri'` `'tri0'` `'tri1'` `'triand'` `'trior'` `'trireg'` `'wand'` `'wire'` `'wor'`
net_lvalue	`'\'` `'{'` `ALPHA`
net_type	`'supply0'` `'supply1'` `'tri'` `'tri0'` `'tri1'` `'triand'` `'trior'` `'wand'` `'wire'` `'wor'`
next_state	`'-'` `'0'` `'1'` `'X'` `'x'`
non_blocking_assignment	`'\'` `'{'` `ALPHA`
notify_register	`'\'` `ALPHA`
number	`"'B"` `"'D"` `"'H"` `"'O"` `"'SB"` `"'SD"` `"'SH"` `"'SO"` `"'Sb"` `"'Sd"` `"'Sh"` `"'So"` `"'b"` `"'d"` `"'h"` `"'o"` `"'sB"` `"'sD"` `"'sH"` `"'sO"` `"'sb"` `"'sd"` `"'sh"` `"'so"` `'+'` `'-'` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'`
octal_base	`"'O"` `"'o"`
octal_digit	`'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'X'` `'Z'` `'x'` `'z'`
octal_number	`"'O"` `"'SO"` `"'So"` `"'o"` `"'sO"` `"'so"` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'`
ordered_port_connection	`ø` `"'B"` `"'D"` `"'H"` `"'O"` `"'SB"` `"'SD"` `"'SH"` `"'SO"` `"'Sb"` `"'Sd"` `"'Sh"` `"'So"` `"'b"` `"'d"` `"'h"` `"'o"` `"'sB"` `"'sD"` `"'sH"` `"'sO"` `"'sb"` `"'sd"` `"'sh"` `"'so"` `'!'` `'"'` `'$'` `'&'` `'('` `'+'` `'-'` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'` `'\'` `'^'` `'^~'` `'{'` `'\|'` `'~&'` `'~'` `'~^'` `'~\|'` `ALPHA`
output_declaration	`'output'`
output_identifier	`'\'` `ALPHA`
output_symbol	`'0'` `'1'` `'X'` `'x'`
output_terminal	`'\'` `ALPHA`
par_block	`'fork'`
parallel_edge_sensitive_path_description	`'('`
parallel_path_description	`'('`
param_assignment	`'\'` `ALPHA`
parameter_declaration	`'localparam'` `'parameter'`
parameter_override	`'defparam'`
parameter_value_assignment	`'#'`
pass_en_switch_instance	`'('` `'\'` `ALPHA`
pass_en_switchtype	`'rtranif0'` `'rtranif1'` `'tranif0'` `'tranif1'`
pass_switch_instance	`'('` `'\'` `ALPHA`
pass_switchtype	`'rtran'` `'tran'`
path_declaration	`'('` `'if'` `'ifnone'`
path_delay_expression	`"'B"` `"'D"` `"'H"` `"'O"` `"'SB"` `"'SD"` `"'SH"` `"'SO"` `"'Sb"` `"'Sd"` `"'Sh"` `"'So"` `"'b"` `"'d"` `"'h"` `"'o"` `"'sB"` `"'sD"` `"'sH"` `"'sO"` `"'sb"` `"'sd"` `"'sh"` `"'so"` `'!'` `'"'` `'&'` `'+'` `'-'` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'` `'\'` `'^'` `'^~'` `'{'` `'\|'` `'~&'` `'~'` `'~^'` `'~\|'` `ALPHA`
path_delay_value	`"'B"` `"'D"` `"'H"` `"'O"` `"'SB"` `"'SD"` `"'SH"` `"'SO"` `"'Sb"` `"'Sd"` `"'Sh"` `"'So"` `"'b"` `"'d"` `"'h"` `"'o"` `"'sB"` `"'sD"` `"'sH"` `"'sO"` `"'sb"` `"'sd"` `"'sh"` `"'so"` `'!'` `'"'` `'&'` `'('` `'+'` `'-'` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'` `'\'` `'^'` `'^~'` `'{'` `'\|'` `'~&'` `'~'` `'~^'` `'~\|'` `ALPHA`
pcontrol_terminal	`"'B"` `"'D"` `"'H"` `"'O"` `"'SB"` `"'SD"` `"'SH"` `"'SO"` `"'Sb"` `"'Sd"` `"'Sh"` `"'So"` `"'b"` `"'d"` `"'h"` `"'o"` `"'sB"` `"'sD"` `"'sH"` `"'sO"` `"'sb"` `"'sd"` `"'sh"` `"'so"` `'!'` `'"'` `'$'` `'&'` `'('` `'+'` `'-'` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'` `'\'` `'^'` `'^~'` `'{'` `'\|'` `'~&'` `'~'` `'~^'` `'~\|'` `ALPHA`
polarity_operator	`'+'` `'-'`
port	`ø` `'.'` `'\'` `'{'` `ALPHA`
port_direction	`'inout'` `'input'` `'output'`
port_expression	`'\'` `'{'` `ALPHA`
port_reference	`'\'` `ALPHA`
primary	`"'B"` `"'D"` `"'H"` `"'O"` `"'SB"` `"'SD"` `"'SH"` `"'SO"` `"'Sb"` `"'Sd"` `"'Sh"` `"'So"` `"'b"` `"'d"` `"'h"` `"'o"` `"'sB"` `"'sD"` `"'sH"` `"'sO"` `"'sb"` `"'sd"` `"'sh"` `"'so"` `'$'` `'('` `'+'` `'-'` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'` `'\'` `'{'` `ALPHA`
procedural_continuous_assignment	`'assign'` `'deassign'` `'force'` `'release'`
procedural_timing_control_statement	`'#'` `'@'` `'repeat'`
pull_gate_instance	`'('` `'\'` `ALPHA`
pulldown_strength	`'('`
pullup_strength	`'('`
pulse_control_specparam	`'PATHPULSE$'`
range	`'['`
range_or_type	`'['` `'integer'` `'real'` `'realtime'` `'time'`
real_declaration	`'real'`
real_number	`'+'` `'-'` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'`
realtime_declaration	`'realtime'`
reg_assignment	`'\'` `'{'` `ALPHA`
reg_declaration	`'reg'`
reg_lvalue	`'\'` `'{'` `ALPHA`
register_name	`'\'` `ALPHA`
scalar_constant	`"'B0"` `"'B1"` `"'b0"` `"'b1"` `"1'B0"` `"1'B1"` `"1'b0"` `"1'b1"` `'0'` `'1'`
scalar_timing_check_condition	`"'B"` `"'D"` `"'H"` `"'O"` `"'SB"` `"'SD"` `"'SH"` `"'SO"` `"'Sb"` `"'Sd"` `"'Sh"` `"'So"` `"'b"` `"'d"` `"'h"` `"'o"` `"'sB"` `"'sD"` `"'sH"` `"'sO"` `"'sb"` `"'sd"` `"'sh"` `"'so"` `'!'` `'"'` `'$'` `'&'` `'('` `'+'` `'-'` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'` `'\'` `'^'` `'^~'` `'{'` `'\|'` `'~&'` `'~'` `'~^'` `'~\|'` `ALPHA`
seq_block	`'begin'`
seq_input_list	`'('` *`''` `'0'` `'1'` `'?'` `'B'` `'F'` `'N'` `'P'` `'R'` `'X'` `'b'` `'f'` `'n'` `'p'` `'r'` `'x'`**
sequencial_body	`'initial'` `'table'`
sequencial_entry	`'('` *`''` `'0'` `'1'` `'?'` `'B'` `'F'` `'N'` `'P'` `'R'` `'X'` `'b'` `'f'` `'n'` `'p'` `'r'` `'x'`**
short_comment	`'//'`
sign	`'+'` `'-'`
signed_binary_base	`"'SB"` `"'Sb"` `"'sB"` `"'sb"`
signed_decimal_base	`"'SD"` `"'Sd"` `"'sD"` `"'sd"`
signed_hex_base	`"'SH"` `"'Sh"` `"'sH"` `"'sh"`
signed_octal_base	`"'SO"` `"'So"` `"'sO"` `"'so"`
simple_identifier	`ALPHA`
simple_path_declaration	`'('`
single_identifier	`'\'` `ALPHA`
size	`'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'`
source_text	`ø` `'macromodule'` `'module'` `'primitive'`
specify_block	`'specify'`
specify_input_terminal_descriptor	`'\'` `ALPHA`
specify_item	`'$hold'` `'$period'` `'$recovery'` `'$setup'` `'$setuphold'` `'$skew'` `'$width'` `'('` `'if'` `'ifnone'` `'specparam'`
specify_output_terminal_descriptor	`'\'` `ALPHA`
specify_terminal_descriptor	`'\'` `ALPHA`
specparam_assignment	`'PATHPULSE$'` `'\'` `ALPHA`
specparam_declaration	`'specparam'`
state_dependent_path_declaration	`'if'` `'ifnone'`
statement	`'#'` `'$'` `'->'` `'@'` `'\'` `'assign'` `'begin'` `'case'` `'casex'` `'casez'` `'deassign'` `'disable'` `'for'` `'force'` `'forever'` `'fork'` `'if'` `'release'` `'repeat'` `'wait'` `'while'` `'{'` `ALPHA`
statement_or_null	`'#'` `'$'` `'->'` `';'` `'@'` `'\'` `'assign'` `'begin'` `'case'` `'casex'` `'casez'` `'deassign'` `'disable'` `'for'` `'force'` `'forever'` `'fork'` `'if'` `'release'` `'repeat'` `'wait'` `'while'` `'{'` `ALPHA`
strength0	`'pull0'` `'strong0'` `'supply0'` `'weak0'`
strength1	`'pull1'` `'strong1'` `'supply1'` `'weak1'`
string	`'"'`
system_task_enable	`'$'`
system_task_name	`'$'`
system_timing_check	`'$hold'` `'$period'` `'$recovery'` `'$setup'` `'$setuphold'` `'$skew'` `'$width'`
task_declaration	`'task'`
task_enable	`'\'` `ALPHA`
task_item_declaration	`'event'` `'inout'` `'input'` `'integer'` `'localparam'` `'output'` `'parameter'` `'real'` `'realtime'` `'reg'` `'time'`
time_declaration	`'time'`
timing_check_condition	`"'B"` `"'D"` `"'H"` `"'O"` `"'SB"` `"'SD"` `"'SH"` `"'SO"` `"'Sb"` `"'Sd"` `"'Sh"` `"'So"` `"'b"` `"'d"` `"'h"` `"'o"` `"'sB"` `"'sD"` `"'sH"` `"'sO"` `"'sb"` `"'sd"` `"'sh"` `"'so"` `'!'` `'"'` `'$'` `'&'` `'('` `'+'` `'-'` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'` `'\'` `'^'` `'^~'` `'{'` `'\|'` `'~&'` `'~'` `'~^'` `'~\|'` `ALPHA`
timing_check_event	`'\'` `'edge'` `'negedge'` `'posedge'` `ALPHA`
timing_check_event_control	`'edge'` `'negedge'` `'posedge'`
timing_check_limit	`"'B"` `"'D"` `"'H"` `"'O"` `"'SB"` `"'SD"` `"'SH"` `"'SO"` `"'Sb"` `"'Sd"` `"'Sh"` `"'So"` `"'b"` `"'d"` `"'h"` `"'o"` `"'sB"` `"'sD"` `"'sH"` `"'sO"` `"'sb"` `"'sd"` `"'sh"` `"'so"` `'!'` `'"'` `'$'` `'&'` `'('` `'+'` `'-'` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'` `'\'` `'^'` `'^~'` `'{'` `'\|'` `'~&'` `'~'` `'~^'` `'~\|'` `ALPHA`
udp_body	`'initial'` `'table'`
udp_declaration	`'primitive'`
udp_initial_statement	`'initial'`
udp_instance	`'('` `'\'` `ALPHA`
udp_instantiation	`'\'` `ALPHA`
udp_port_declaration	`'input'` `'output'` `'reg'`
udp_port_list	`'\'` `ALPHA`
unary_operator	`'!'` `'&'` `'+'` `'-'` `'^'` `'^~'` `'\|'` `'~&'` `'~'` `'~^'` `'~\|'`
unsigned_number	`'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'`
wait_statement	`'wait'`

Lookahead-1 Parser Ambiguities

Ref	Production	Ambiguous Literals/Terminals	Can't decide between the following
^#1	binary_number	`'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'`	( [ size ] signed_binary_base binary_digit { `'_'` \| binary_digit } )^(vlog2001) [ size ] binary_base binary_digit { `'_'` \| binary_digit }
^#2	charge_strength	`'('`	`'('` `'small'` `')'` `'('` `'large'` `')'` `'('` `'medium'` `')'`
^#3	constant_expression	`"'B"` `"'D"` `"'H"` `"'O"` `"'SB"` `"'SD"` `"'SH"` `"'SO"` `"'Sb"` `"'Sd"` `"'Sh"` `"'So"` `"'b"` `"'d"` `"'h"` `"'o"` `"'sB"` `"'sD"` `"'sH"` `"'sO"` `"'sb"` `"'sd"` `"'sh"` `"'so"` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'` `'\'` `'{'` `ALPHA`	constant_primary constant_expression `'?'` constant_expression `':'` constant_expression constant_expression binary_operator constant_expression
^#4	constant_expression	`'+'` `'-'`	constant_primary constant_expression `'?'` constant_expression `':'` constant_expression unary_operator constant_primary constant_expression binary_operator constant_expression
^#5	constant_expression	`'!'` `'&'` `'^'` `'^~'` `'\|'` `'~&'` `'~'` `'~^'` `'~\|'`	constant_expression `'?'` constant_expression `':'` constant_expression unary_operator constant_primary constant_expression binary_operator constant_expression
^#6	constant_expression	`'"'`	string constant_expression `'?'` constant_expression `':'` constant_expression constant_expression binary_operator constant_expression
^#7	constant_mintypmax_expression	`"'B"` `"'D"` `"'H"` `"'O"` `"'SB"` `"'SD"` `"'SH"` `"'SO"` `"'Sb"` `"'Sd"` `"'Sh"` `"'So"` `"'b"` `"'d"` `"'h"` `"'o"` `"'sB"` `"'sD"` `"'sH"` `"'sO"` `"'sb"` `"'sd"` `"'sh"` `"'so"` `'!'` `'"'` `'&'` `'+'` `'-'` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'` `'\'` `'^'` `'^~'` `'{'` `'\|'` `'~&'` `'~'` `'~^'` `'~\|'` `ALPHA`	constant_expression constant_expression `':'` constant_expression `':'` constant_expression
^#8	constant_primary	`'{'`	constant_multiple_concatenation constant_concatenation
^#9	decimal_number	`'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'`	( [ size ] signed_decimal_base unsigned_number )^(vlog2001) [ sign ] unsigned_number [ size ] decimal_base unsigned_number
^#10	delay2	`'#'`	`'#'` `'('` delay_value [ `','` delay_value ] `')'` `'#'` delay_value
^#11	delay3	`'#'`	`'#'` delay_value `'#'` `'('` delay_value [ `','` delay_value [ `','` delay_value ] ] `')'`
^#12	delay_control	`'#'`	`'#'` delay_value `'#'` `'('` mintypmax_expression `')'`
^#13	delay_value	`'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'`	unsigned_number constant_mintypmax_expression
^#14	delay_value	`'\'` `ALPHA`	constant_mintypmax_expression parameter_identifier
^#15	disable_statement	`'disable'`	`'disable'` task_identifier `';'` `'disable'` block_identifier `';'`
^#16	drive_strength	`'('`	`'('` `'highz0'` `','` strength1 `')'` `'('` strength0 `','` strength1 `')'` `'('` strength0 `','` `'highz1'` `')'` `'('` strength1 `','` strength0 `')'` `'('` strength1 `','` `'highz0'` `')'` `'('` `'highz1'` `','` strength0 `')'`
^#17	edge_sensitive_path_declaration	`'('`	parallel_edge_sensitive_path_description `'='` path_delay_value full_edge_sensitive_path_description `'='` path_delay_value
^#18	event_control	`'@'`	( `'@'` *`''` )^(vlog2001) `'@'`** event_identifier `'@'` `'('` event_expression `')'`
^#19	event_expression	`"'B"` `"'D"` `"'H"` `"'O"` `"'SB"` `"'SD"` `"'SH"` `"'SO"` `"'Sb"` `"'Sd"` `"'Sh"` `"'So"` `"'b"` `"'d"` `"'h"` `"'o"` `"'sB"` `"'sD"` `"'sH"` `"'sO"` `"'sb"` `"'sd"` `"'sh"` `"'so"` `'!'` `'"'` `'$'` `'&'` `'('` `'+'` `'-'` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'` `'^'` `'^~'` `'{'` `'\|'` `'~&'` `'~'` `'~^'` `'~\|'`	expression ( event_expression `'or'` event_expression )^(vlog2001) event_expression `','` event_expression
^#20	event_expression	`'\'` `ALPHA`	expression event_identifier ( event_expression `'or'` event_expression )^(vlog2001) event_expression `','` event_expression
^#21	event_expression	`'posedge'`	( event_expression `'or'` event_expression )^(vlog2001) `'posedge'` expression event_expression `','` event_expression
^#22	event_expression	`'negedge'`	( event_expression `'or'` event_expression )^(vlog2001) `'negedge'` expression event_expression `','` event_expression
^#23	expression	`"'B"` `"'D"` `"'H"` `"'O"` `"'SB"` `"'SD"` `"'SH"` `"'SO"` `"'Sb"` `"'Sd"` `"'Sh"` `"'So"` `"'b"` `"'d"` `"'h"` `"'o"` `"'sB"` `"'sD"` `"'sH"` `"'sO"` `"'sb"` `"'sd"` `"'sh"` `"'so"` `'$'` `'('` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'` `'\'` `'{'` `ALPHA`	primary expression `'?'` expression `':'` expression expression binary_operator expression
^#24	expression	`'+'` `'-'`	primary expression `'?'` expression `':'` expression unary_operator primary expression binary_operator expression
^#25	expression	`'!'` `'&'` `'^'` `'^~'` `'\|'` `'~&'` `'~'` `'~^'` `'~\|'`	expression `'?'` expression `':'` expression unary_operator primary expression binary_operator expression
^#26	expression	`'"'`	string expression `'?'` expression `':'` expression expression binary_operator expression
^#27	hex_number	`'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'`	( [ size ] signed_hex_base hex_digit { `'_'` \| hex_digit } )^(vlog2001) [ size ] hex_base hex_digit { `'_'` \| hex_digit }
^#28	inout_terminal	`'\'` `ALPHA`	terminal_identifier terminal_identifier `'['` constant_expression `']'`
^#29	input_identifier	`'\'` `ALPHA`	input_port_identifier inout_port_identifier
^#30	list_of_path_delay_expressions	`"'B"` `"'D"` `"'H"` `"'O"` `"'SB"` `"'SD"` `"'SH"` `"'SO"` `"'Sb"` `"'Sd"` `"'Sh"` `"'So"` `"'b"` `"'d"` `"'h"` `"'o"` `"'sB"` `"'sD"` `"'sH"` `"'sO"` `"'sb"` `"'sd"` `"'sh"` `"'so"` `'!'` `'"'` `'&'` `'+'` `'-'` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'` `'\'` `'^'` `'^~'` `'{'` `'\|'` `'~&'` `'~'` `'~^'` `'~\|'` `ALPHA`	t_path_delay_expression trise_path_delay_expression `','` tfall_path_delay_expression trise_path_delay_expression `','` tfall_path_delay_expression `','` tz_path_delay_expression t01_path_delay_expression `','` t10_path_delay_expression `','` t0z_path_delay_expression `','` tz1_path_delay_expression `','` t1z_path_delay_expression `','` tz0_path_delay_expression t01_path_delay_expression `','` t10_path_delay_expression `','` t0z_path_delay_expression `','` tz1_path_delay_expression `','` t1z_path_delay_expression `','` tz0_path_delay_expression `','` t0x_path_delay_expression `','` tx1_path_delay_expression `','` t1x_path_delay_expression `','` tx0_path_delay_expression `','` txz_path_delay_expression `','` tzx_path_delay_expression
^#31	mintypmax_expression	`"'B"` `"'D"` `"'H"` `"'O"` `"'SB"` `"'SD"` `"'SH"` `"'SO"` `"'Sb"` `"'Sd"` `"'Sh"` `"'So"` `"'b"` `"'d"` `"'h"` `"'o"` `"'sB"` `"'sD"` `"'sH"` `"'sO"` `"'sb"` `"'sd"` `"'sh"` `"'so"` `'!'` `'"'` `'$'` `'&'` `'('` `'+'` `'-'` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'` `'\'` `'^'` `'^~'` `'{'` `'\|'` `'~&'` `'~'` `'~^'` `'~\|'` `ALPHA`	expression expression `':'` expression `':'` expression
^#32	module_item	`'\'` `ALPHA`	udp_instantiation module_instantiation
^#33	module_item_declaration	`'inout'`	inout_declaration ( port_direction net_declaration )^(vlog2001) ( port_direction reg_declaration )^(vlog2001) ( port_direction integer_declaration )^(vlog2001) ( port_direction time_declaration )^(vlog2001)
^#34	module_item_declaration	`'output'`	output_declaration ( port_direction net_declaration )^(vlog2001) ( port_direction reg_declaration )^(vlog2001) ( port_direction integer_declaration )^(vlog2001) ( port_direction time_declaration )^(vlog2001)
^#35	module_item_declaration	`'input'`	input_declaration ( port_direction net_declaration )^(vlog2001) ( port_direction reg_declaration )^(vlog2001) ( port_direction integer_declaration )^(vlog2001) ( port_direction time_declaration )^(vlog2001)
^#36	net_declaration	`'supply0'` `'supply1'` `'tri'` `'tri0'` `'tri1'` `'triand'` `'trior'` `'wand'` `'wire'` `'wor'`	net_type [ `'vectored'` \| `'scalared'` ] [ `'signed'` ]^(vlog2001) [ range ] [ delay3 ] list_of_net_identifiers `';'` net_type [ `'vectored'` \| `'scalared'` ] [ drive_strength ] [ `'signed'` ]^(vlog2001) [ range ] [ delay3 ] list_of_net_decl_assignments `';'`
^#37	net_lvalue	`'\'` `ALPHA`	net_identifier net_identifier `'['` expression `']'` net_identifier `'['` msb_constant_expression `':'` lsb_constant_expression `']'`
^#38	number	`'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'`	hex_number decimal_number binary_number octal_number real_number
^#39	number	`'+'` `'-'`	decimal_number real_number
^#40	octal_number	`'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'`	( [ size ] signed_octal_base octal_digit { `'_'` \| octal_digit } )^(vlog2001) [ size ] octal_base octal_digit { `'_'` \| octal_digit }
^#41	output_identifier	`'\'` `ALPHA`	output_port_identifier inout_port_identifier
^#42	output_terminal	`'\'` `ALPHA`	terminal_identifier terminal_identifier `'['` constant_expression `']'`
^#43	path_declaration	`'('`	simple_path_declaration edge_sensitive_path_declaration
^#44	port_reference	`'\'` `ALPHA`	port_identifier port_identifier `'['` constant_expression `']'` port_identifier `'['` msb_constant_expression `':'` lsb_constant_expression `']'`
^#45	primary	`'\'` `ALPHA`	identifier function_call identifier `'['` expression `']'` identifier `'['` msb_constant_expression `':'` lsb_constant_expression `']'`
^#46	primary	`'{'`	concatenation multiple_concatenation
^#47	procedural_continuous_assignment	`'release'`	`'release'` reg_lvalue `';'` `'release'` net_lvalue `';'`
^#48	procedural_continuous_assignment	`'force'`	`'force'` reg_assignment `';'` `'force'` net_assignment `';'`
^#49	pulldown_strength	`'('`	`'('` strength0 `','` strength1 `')'` `'('` strength0 `')'` `'('` strength1 `','` strength0 `')'`
^#50	pullup_strength	`'('`	`'('` strength0 `','` strength1 `')'` `'('` strength1 `')'` `'('` strength1 `','` strength0 `')'`
^#51	pulse_control_specparam	`'PATHPULSE$'`	`'PATHPULSE$'` `'='` `'('` reject_limit_value [ `','` error_limit_value ] `')'` `';'` `'PATHPULSE$'` specify_input_terminal_descriptor `'$'` specify_output_terminal_descriptor `'='` `'('` reject_limit_value [ `','` error_limit_value ] `')'` `';'`
^#52	real_number	`'+'` `'-'` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'`	[ sign ] unsigned_number `'.'` unsigned_number [ sign ] unsigned_number [ `'.'` unsigned_number ] `'E'` [ sign ] unsigned_number [ sign ] unsigned_number [ `'.'` unsigned_number ] `'e'` [ sign ] unsigned_number
^#53	reg_lvalue	`'\'` `ALPHA`	reg_identifier reg_identifier `'['` expression `']'` reg_identifier `'['` msb_constant_expression `':'` lsb_constant_expression `']'`
^#54	register_name	`'\'` `ALPHA`	register_identifier memory_identifier `'['` upper_limit_constant_expression `':'` lower_limit_constant_expression `']'`
^#55	scalar_timing_check_condition	`"'B"` `"'D"` `"'H"` `"'O"` `"'SB"` `"'SD"` `"'SH"` `"'SO"` `"'Sb"` `"'Sd"` `"'Sh"` `"'So"` `"'b"` `"'d"` `"'h"` `"'o"` `"'sB"` `"'sD"` `"'sH"` `"'sO"` `"'sb"` `"'sd"` `"'sh"` `"'so"` `'!'` `'"'` `'$'` `'&'` `'('` `'+'` `'-'` `'0'` `'1'` `'2'` `'3'` `'4'` `'5'` `'6'` `'7'` `'8'` `'9'` `'\'` `'^'` `'^~'` `'{'` `'\|'` `'~&'` `'~^'` `'~\|'` `ALPHA`	expression expression `'==='` scalar_constant expression `'=='` scalar_constant expression `'!='` scalar_constant expression `'!=='` scalar_constant
^#56	scalar_timing_check_condition	`'~'`	expression expression `'==='` scalar_constant `'~'` expression expression `'=='` scalar_constant expression `'!='` scalar_constant expression `'!=='` scalar_constant
^#57	seq_input_list	`'0'` `'1'` `'?'` `'B'` `'X'` `'b'` `'x'`	level_input_list edge_input_list
^#58	simple_path_declaration	`'('`	parallel_path_description `'='` path_delay_value full_path_description `'='` path_delay_value
^#59	specify_input_terminal_descriptor	`'\'` `ALPHA`	input_identifier input_identifier `'['` constant_expression `']'` input_identifier `'['` msb_constant_expression `':'` lsb_constant_expression `']'`
^#60	specify_output_terminal_descriptor	`'\'` `ALPHA`	output_identifier output_identifier `'['` constant_expression `']'` output_identifier `'['` msb_constant_expression `':'` lsb_constant_expression `']'`
^#61	specify_terminal_descriptor	`'\'` `ALPHA`	specify_input_terminal_descriptor specify_output_terminal_descriptor
^#62	state_dependent_path_declaration	`'if'`	`'if'` `'('` conditional_expression `')'` simple_path_declaration `'if'` `'('` conditional_expression `')'` edge_sensitive_path_declaration
^#63	statement	`'{'`	blocking_assignment `';'` non_blocking_assignment `';'`
^#64	statement	`'\'` `ALPHA`	task_enable blocking_assignment `';'` non_blocking_assignment `';'`
^#65	statement	`'repeat'`	procedural_timing_control_statement loop_statement
^#66	timing_check_condition	`'('`	scalar_timing_check_condition `'('` scalar_timing_check_condition `')'`
^#67	udp_body	`'table'`	combinational_body sequencial_body

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